Six Figure Work

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FPGA Engineer (Algo)

DRW

Company websitedrw.com (DRW, opens in new tab)

Base salary $150K  to $250K

Employer-published annual base salary, USD. Advertised base range in Chicago, IL

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  • LocationChicago, IL
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (3 h ago) · observed since

About this job

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot to capture opportunities, so we operate using our own capital and trading at our own risk.

Headquartered in Chicago with offices throughout the U.S., Canada, Europe, and Asia, we trade a variety of asset classes including Fixed Income, ETFs, Equities, FX, Commodities and Energy across all major global markets. We have also leveraged our expertise and technology to expand into three non-traditional strategies: real estate, venture capital and cryptoassets.

We operate with respect, curiosity and open minds. The people who thrive here share our belief that it’s not just what we do that matters–it's how we do it. DRW is a place of high expectations, integrity, innovation and a willingness to challenge consensus.

We are currently seeking a FPGA Engineer to join one of our trading teams. While DRW has been leveraging FPGA technology for a number of years, you will have the opportunity to build an FPGA application from scratch for an existing team. We’re seeking a candidate that has a strong understanding of software and hardware interaction. This person will participate in the full development lifecycle, including system and block level testing, of low latency high throughput FPGA design.

This role is for the Chicago office only.

Responsibilities: 

  • Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up
  • Research and evaluate a variety of cutting-edge FPGA hardware and technologies
  • Propose creative solutions to overcome FPGA/hardware limitations
  • Liaise directly with software and other design teams
  • Conduct lab debugging and characterization of new hardware

Candidate Requirements: 

  • Bachelor’s degree or higher, Computer/Electrical Engineering with 3+ years of experience within the field; (Master’s degree or higher also counts for experience)
  • Solid Hardware Engineering experience, especially with FPGA
  • Highly autonomous with a can-do attitude able to lead an FPGA based project from system requirements to production
  • Strong capacity to quickly evaluate FPGA based project feasibility based on hardware limitation
  • Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing Verilog
  • Experience in FPGA design flow including synthesis, place & route , static timing analysis is required
  • Experience with the design of system-on-chip (SOC) architectures, memory & processor subsystems, networking, and peripheral interconnect is required
  • Knowledge of the TCP/IP stack
  • Strong working knowledge of either XILINX or ALTERA FPGA design flow
  • Experience with functional verification utilizing high-level methodologies (e.g. System Verilog) is a plus.
  • Excellent research and data gathering skills

The annual base salary range for this position is $150,000 to $250,000 depending on the candidate’s experience, qualifications, and relevant skill set. The position is also eligible for an annual discretionary bonus. In addition, DRW offers a comprehensive suite of employee benefits including group medical, pharmacy, dental and vision insurance, 401k (with discretionary employer match), short and long-term disability, life and AD&D insurance, health savings accounts, and flexible spending accounts.

For more information about DRW's processing activities and our use of job applicants' data, please view our Privacy Notice at https://drw.com/privacy-notice.

California residents, please review the California Privacy Notice for information about certain legal rights at https://drw.com/california-privacy-notice.

#LI-BL1

Source: DRW on Greenhouse · View original posting (opens in new tab)

This range next to 6 other live DRW roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live DRW roles with the nearest advertised base floor
RolePublished base
FPGA Engineer (Algo) (this listing)$150K - $250K
Python Software Engineer, Trading Platform$150K - $180K
Data Engineer, Cumberland/Options$150K - $200K
Client Platforms Security Engineer$150K - $200K
Senior Power Strategist - Load$150K - $250K
Staff IAM Engineer$150K - $200K
Senior Software Engineer, C++ (Algo)$150K - $250K

Same $100K to $400K scale as every card. All DRW roles · How to read the bar

Observed changes

  1. Began meeting the published-salary criteria
  2. First observed on the employer's board
Observed since
Employer-stated posting date
2025-06-13
Where this pay comes from

Location as the employer wrote it: Chicago

The annual base salary range for this position is $150,000 to $250,000 depending on the candidate’s experience, qualifications, an

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
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The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.