Physical Design Engineer
Company websiteetched.com (Etched, opens in new tab)
Base salary $200K to $375K
Employer-published annual base salary, USD. Advertised base range in San Jose, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSan Jose, CA
- WorkplaceOn-site
- Status at last checkSource accepting applications when checked
- Last checked (3 h ago) · observed since
About this job
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
Etched is looking for exceptional Physical Design engineers to join our team. In this role, you
will own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.
Key Responsibilities
Deeply understand what is involved in physical design
Running PD flows to close blocks, support ASIC infrastructure, automate PD flows,
improve CAD infrastructureCollaborate with RTL Designers and provide Physical Design feedback to improve PPA
Drive dashboards that show the convergence of projects related to PD
Optimize tool flows, working with EDA vendors to incorporate the latest features
Accountable for block level closure
Supervise the outsourcing of physical design to a 3rd party service
You may be a good fit if you have
5-10+ years of previous experience with PD
Tools, flow, and design methodology from RTL synthesis to GDSII sign-off
Experience with back-end design and timing closure on advanced process nodes (5nm
and below)Experience with Cadence (Innovus, Genus) or Synopsys (ICC2, Fusion Compiler)
automated RTL-to-GDSII flowsExperience with sign-off tools (PrimeTime, Tempus, Voltus, etc.)
Experience with UPF-based low power design methodology, power verification,synthesis, scan insertion/ATPG, formal verification, floorplanning, placement, CTS,
routing, IR drop, and EM/antenna analysisDeeply creative and able to think from first principles
Strong candidates may also have experience with
Familiarity with modern ML and LLM model architectures
Ability to program with Python or another scripting language
Familiarity with AI tools for programming/coding
Startup experience or comfort working in fast-paced environments
Benefits
Medical, dental, and vision packages with generous premium coverage
$500 per month credit for waiving medical benefits
Housing subsidy of $2.5k per month for those living within walking distance of the office
Relocation support for those moving to San Jose (Santana Row)
Various wellness benefits covering fitness, mental health, and more
Daily lunch + dinner in our office
Unlimited compute budget subject to ROI justification
How we’re different:
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Source: Etched on Ashby · View original posting (opens in new tab)
This listingPhysical Design Engineer$200K to $375K
Physical Design Engineer - Block Level, Subsystem Implementation$200K to $375K
Physical Design Engineer - Block Level, Subsystem Implementation$200K to $375K
Physical Design Engineer$200K to $375K
Supercomputing Engineer$200K to $350K
ASIC Architect$200K to $400K
Head of Inference Performance Visibility$200K to $400K
Chart as a table
| Role | Published base |
|---|---|
| Physical Design Engineer (this listing) | $200K - $375K |
| Physical Design Engineer - Block Level, Subsystem Implementation | $200K - $375K |
| Physical Design Engineer - Block Level, Subsystem Implementation | $200K - $375K |
| Physical Design Engineer | $200K - $375K |
| Supercomputing Engineer | $200K - $350K |
| ASIC Architect | $200K - $400K |
| Head of Inference Performance Visibility | $200K - $400K |
Observed changes
- Began meeting the published-salary criteria
- First observed on the employer's board
- Advertised base range changed
- Observed since
- Employer-stated posting date
- 2025-08-11
Where this pay comes from
Location as the employer wrote it: San Jose
USD 200,000 – 375,000 · 1 YEAR · Salary
- Method
- Structured pay field published by the employer
- Checked
- Rule set
- us-base-v2
The employer's job board publishes this pay as a dedicated data field. We read the field directly; no interpretation was needed.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
