Principal ASIC Design Verification Engineer - Terawave
Company websiteblueorigin.com (Blue Origin, opens in new tab)
Base salary $269,175 to $376,844
Employer-published annual base salary, USD. Advertised base range in Central, TX +3 more
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationCentral, TX +3 more
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (1 h ago) · observed since
All 4 locations
- Central Texas
- Greater Seattle Area
- Cupertino, CA
- San Diego, CA
About this job
Application close date:
Applications will be accepted on an ongoing basis until the requisition is closed.At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!
Blue Origin is pioneering the future of space-based connectivity with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This network will service tens of thousands of enterprise, data center, and government users who require reliable connectivity for critical operations.Job Description
As a Principal Verification Engineer on the ASIC & Networking team, you support TeraWave's first in-house silicon program, which comprises a high-throughput modem and a DSP-intensive digital beamformer with first tapeout targeted for 2027. Verification strategy, methodology, and infrastructure are being defined now, and you help define them.
The work spans IP, subsystem, and full SoC verification, including CPU subsystems, performance-critical interconnects, security, high-speed peripherals, modem datapath and PHY layers, DSP and beamforming compute, and mixed-signal interfaces. You own a subset of this scope aligned to your background.
The team treats constrained-random simulation, formal methods, and processor-driven SoC testing as equal first-class tools, and is building an AI-enabled verification platform that includes LLM-assisted stimulus and testbench generation, automated regression triage and failure clustering, and data-driven coverage closure. Because none of this is inherited, the engineers who build these capabilities will own them - and grow with the program as it scales.
Background in wireless communications, modem, baseband, and DSP verification is welcome but not required. Architects and modeling engineers support your ramp, and verification judgment and system-level thinking are weighted above domain background.
Responsibilities:
- Lead verification for chip level and complex subsystems through sign-off, collaborating with global engineering teams.
- Own verification strategy, test plans, and measurable coverage goals across assigned subsystems and SoC.
- Identify verification gaps, propose methodology changes, and implement them across the verification organization.
- Serve as subject area expert, setting technical direction and resolving escalated verification problems.
- Architect reusable verification environments, reference models, and infrastructure spanning IP, subsystem, and SoC levels.
- Drive regression health, coverage closure, and sign-off readiness across simulation and formal results.
- Review testbench architecture and debug approaches, and mentor engineers in verification methodology.
- Partner with design, architecture, and modeling teams to align verification with program milestones.
Basic Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, or equivalent experience.
- Minimum 12 years of professional experience in ASIC or SoC functional verification.
- Hands-on expertise in SystemVerilog and UVM testbench development, plus metric driven verification.
- Experience as verification technical lead on at least one taped out silicon program.
- Willingness to travel up to 10 percent to other team locations.
Preferred Qualifications:
- Recognized depth in at least one verification specialty applied on production silicon programs.
- Formal verification experience on production silicon, including connectivity, register maps, arbitration, CDC, or security properties.
- Gate level simulation experience, including timing aware and post layout runs and debug.
- Verification background in wireless or wired communication systems, including modem, baseband, PHY, or DSP hardware.
- Experience verifying LDPC, FEC, framing, or beamforming logic using bit-accurate reference models and fixed-point analysis.
- Experience developing C based or portable stimulus for SoC, CPU boot, and firmware driven scenarios.
- Experience applying AI, ML, or LLM tooling to stimulus generation, regression triage, or coverage analysis.
Base Pay Range for:
CA applicants is $269,175.00 - $376,843.95
WA applicants is $269,175.00 - $376,843.95Other site ranges may differ
Culture Statement
Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.
Export Control Regulations
Applicants for employment at Blue Origin must be a U.S. citizen or national, U.S. permanent resident (i.e. current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
Background Check
- Required for all positions: Blue’s Standard Background Check
- Required for Certain Job Profiles: Defense Biometric Identification System (DBIDS) background check if at any time the role requires one to be on a military installation
- Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs. and/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training.
- Required for certain Job Profiles: Ability to obtain and maintain Merchant Mariner Credential, which includes pre-employment and random drug testing as well as DOT physical
Benefits
- Benefits include: Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
- Stock Options for all regular employees (working at least 20 hours/week)
- Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
- Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward individual contributions and enable them to share in the company's results, or other factors at the company's sole discretion. Bonus amounts and eligibility are not guaranteed and subject to change and cancellation. Please check with your recruiter for more details.
Equal Employment Opportunity
Blue Origin is proud to be an Equal Opportunity/Affirmative Action Employer and is committed to attracting, retaining, and developing a highly qualified and dedicated work force. Blue Origin hires and promotes people on the basis of their qualifications, performance, and abilities. We support the establishment and maintenance of a workplace that fosters trust, equality, and teamwork. We provide all qualified applicants for employment and employees with equal opportunities for hire, promotion, and other terms and conditions of employment, regardless of their race, color, religion, sex, sexual orientation, gender identity, national origin/ethnicity, age, physical or mental disability, genetic factors, military/veteran status, or any other status or characteristic protected by federal, state, and/or local law. Blue Origin will consider for employment qualified applicants with criminal histories in a manner consistent with applicable federal, state, and local laws, including the Washington Fair Chance Act, the California Fair Chance Act, the Los Angeles Fair Chance in Hiring Ordinance, and other applicable laws. For more information on “Know Your Rights,” please see here.
Affirmative Action and Disability Accommodation
Applicants wishing to receive information on Blue Origin’s Affirmative Action Plans, or applicants requiring a reasonable accommodation in order to participate in the application and/or interview process, please contact us at [email protected]. Please note this is a publicly managed inbox. Please do not include any personal medical information in your request.
Source: Blue Origin on Workday · View original posting (opens in new tab)
Pay in context
This role's base floor ($269,175) is above 98% of the 941 Engineering (non-software) roles in Washington listed on this site; 4 others list the same floor. Their median floor is $136,600; the middle half runs from $120,000 to $159,200.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.
This listingPrincipal ASIC Design Verification Engineer - Terawave$269,175 to $376,844
Principal Analog Mixed-Signal IC Design Engineer - TeraWave$269,175 to $376,844
Principal Modem SOC Design Engineer - Terawave$269,175 to $376,844
Principal FPGA Designer – TeraWave$269,175 to $376,844
Principal RF/mmWave IC Layout Design Engineer – TeraWave$269,175 to $376,844
Principal mmWave IC Design Engineer - TeraWave$269,175 to $376,844
Principal SOC Performance Analysis Engineer - Terawave$269,175 to $376,844
Chart as a table
| Role | Published base |
|---|---|
| Principal ASIC Design Verification Engineer - Terawave (this listing) | $269,175 - $376,844 |
| Principal Analog Mixed-Signal IC Design Engineer - TeraWave | $269,175 - $376,844 |
| Principal Modem SOC Design Engineer - Terawave | $269,175 - $376,844 |
| Principal FPGA Designer – TeraWave | $269,175 - $376,844 |
| Principal RF/mmWave IC Layout Design Engineer – TeraWave | $269,175 - $376,844 |
| Principal mmWave IC Design Engineer - TeraWave | $269,175 - $376,844 |
| Principal SOC Performance Analysis Engineer - Terawave | $269,175 - $376,844 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- fields changed
- Stopped meeting the published-salary criteria
- Began meeting the published-salary criteria
- Advertised base range changed
- fields changed
- fields changed
- Advertised base range changed
- fields changed
- Advertised base range changed
- Observed since
- Employer-stated posting date
- 2026-11-03
Where this pay comes from
Location as the employer wrote it: Multiple locations (4)
CA applicants is $269,175.00 - $376,843.95 WA applicants is $269,175.00 - $376,843.95
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
