Six Figure Work

Senior FPGA Prototyping Engineer

K2 Space

Company websitek2space.com (K2 Space, opens in new tab)

Base salary $120K  to $225K

Employer-published annual base salary, USD. Advertised base range in Seattle, WA

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  • LocationSeattle, WA
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (1 h ago) · observed since

About this job

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.

With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.

The Role

We are seeking a Senior FPGA & Silicon Bring-up Engineer to accelerate the development of next-generation communications ASICs. You will own FPGA prototyping, firmware enablement, first-silicon bring-up, and hardware validation, serving as the bridge between ASIC design, firmware, software, and system integration. This role spans the entire silicon lifecycle from pre-silicon FPGA platforms that enable early hardware/software integration to post-silicon debug, interface validation, and automated test infrastructure.

Responsibilities

  • Develop FPGA-based prototypes to enable early ASIC integration, firmware development, and system validation.
  • Build hardware platforms that allow software and firmware teams to develop before first silicon.
  • Support first-silicon bring-up, debug, and functional validation.
  • Develop automated validation infrastructure for silicon characterization and regression testing.
  • Configure and validate digital interfaces including high-speed Ethernet SerDes, SPI, UART, GPIO, and other peripheral interfaces.
  • Develop FPGA-based traffic generators, protocol checkers, and test applications for interface validation.
  • Debug issues spanning RTL, firmware, software, FPGA prototypes, and silicon using simulation and laboratory instrumentation.
  • Collaborate closely with ASIC Design, Verification, Firmware, Software, Systems, and DFT teams to accelerate product development.

Qualifications

  • BS or MS in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of FPGA development experience using Verilog/SystemVerilog and AMD/Xilinx FPGA tools.
  • Strong understanding of ASIC development and digital system architecture.
  • Experience with FPGA prototyping for ASIC development.
  • Experience with firmware/software enablement and hardware bring-up.
  • Strong hardware debugging skills using JTAG, oscilloscopes, logic analyzers, and protocol analyzers.
  • Proficiency with Python and scripting for automation and test infrastructure.

Nice to Have

  • Experience with networking, communications, or satellite systems.
  • Experience with embedded processors (ARM or RISC-V).
  • Experience working with hard real-time embedded systems (bare-metal or RTOS).
  • Experience validating high-speed digital interfaces, including Ethernet and SerDes protocols, SPI, and UART.
  • Experience with silicon bring-up using JTAG, logic analyzers, and oscilloscopes.

Compensation and Benefits:

  • Base salary range for this role is $120,000 – $225,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!

If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.

Export Compliance

As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.”

The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.

Equal Opportunity

K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Source: K2 Space on Greenhouse · View original posting (opens in new tab)

This range next to 6 other live K2 Space roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live K2 Space roles with the nearest advertised base floor
RolePublished base
Senior FPGA Prototyping Engineer (this listing)$120K - $225K
Harness Design Engineer$120K - $160K
Senior FPGA Engineer (TS/SCI)$120K - $225K
Senior FPGA Prototyping Engineer$120K - $225K
GNC Engineer - Trajectory Design and Guidance Engineer$120K - $200K
Senior FPGA Engineer$120K - $225K
Senior FPGA Engineer$120K - $225K

Same $100K to $400K scale as every card. All K2 Space roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-08-11
Where this pay comes from

Location as the employer wrote it: Seattle, WA

- Base salary range for this role is $120,000 – $225,000 + equity in the company

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.