Senior PCB Design Engineer
Company websitearista.com (Arista Networks, opens in new tab)
Base salary $133K to $180K
Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSanta Clara, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (1 h ago) · observed since
About this job
Company Description
Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges.
At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation.
Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.
Job Description
Who You’ll Work With
Working closely with cross-functional teams including Hardware Design, Signal Integrity (SI), Power Integrity (PI), Mechanical Engineering, Thermal Engineering, and Manufacturing, our engineers innovate on system architectures and ultra-high-speed PCB designs to deliver state-of- the-art networking platforms.
What You'll Do
Our Hardware Design Engineering team is at the forefront of developing high-speed networking and Ethernet products used in enterprise campuses, hyperscale datacenters, and next-generation AI clusters. The team is responsible for end-to-end design and development of advanced hardware solutions that meet the demands of modern networking environments — including optical interface platforms up to 800G and 1.6T.
Core Responsibilities
High-Speed Layout & Routing
Implement complex routing for advanced interfaces such as 112G/224G SerDes, PCIe Gen 5/6, DDR4/5/6
Design and route high-speed differential pairs with tight skew and impedance control
Execute dense BGA fan-out for high-pin-count ASICs and FPGAs
Optical Transceiver PCB Layout (800G / 1.6T)
Design and layout boards supporting high-bandwidth optical transceivers (QSFP-DD, OSFP, OSFP-XD or equivalent)
Route 112G / 224G PAM4 electrical channels between switch ASICs and optical modules
Define insertion loss budgets and coordinate with SI engineers to meet IEEE compliance requirements
Optimize breakout routing beneath high-density optical cages
Implement via stub mitigation strategies including backdrilling for ultra-high-speed signal paths
Manage ground reference continuity, EMI control, and return path integrity near optical connectors
Consider thermal dissipation (20W–30W+ modules) in layout planning
Impedance Control & Signal Integrity
Design advanced multi-layer stack-ups (20–30+ layers)
Calculate impedance profiles and ensure low-reflection, low-crosstalk performance
Collaborate with SI teams on channel modeling and pre-/post-layout simulations
Power Integrity (PI) Optimization
Design robust Power Distribution Networks (PDNs) for high-current ASICs
Layout multi-phase DC/DC converters for high transient loads
Strategically place decoupling capacitors to ensure wideband impedance stability
Thermal & Mechanical Coordination
Integrate thermal vias, heat sink attachments, and high-conductivity materials
Coordinate mechanical constraints such as enclosure, airflow, and structural limitations
Ensure proper placement and structural integration of optical cages
Advanced Fabrication Deliverables
Generate comprehensive manufacturing packages (Gerber, ODB++, IPC-2581)
Define backdrilling parameters and impedance specifications
Ensure compliance with DFM, DFA, and DFT requirements
Support boards through fabrication, assembly, and production ramp
Library & Feasibility Ownership
Create and maintain high-density component footprints (e.g., large BGAs, optical module connectors)
Participate in new product feasibility studies
Develop detailed routing guidelines and work packages for layout partners
Review external placement and routing work to ensure quality and schedule adherence
Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or related field
10+ years of relevant hardware engineering experience
Proven experience designing networking hardware, particularly involving 100G/200G PAM4 Ethernet switching
Direct experience in high-speed optical transceiver PCB layout (800G and/or 1.6T preferred)
Expertise with 112G / 224G PAM4 routing and channel optimization
Advanced proficiency in Cadence Allegro and Sigrity
Experience designing 20+ layer boards with 50G+ signals
Hands-on experience with sequential lamination, HDI, ultra-low-loss materials
Experience in multi-phase DC/DC layout for high-current, high transient loads
Strong manufacturing knowledge including DFM, DFA, and DFT for 30+ layer rigid and rigid-flex boards
Demonstrated success taking products from concept through mass production
Compensation Information
The new hire base pay for this role has a salary range of $133,000 to $180,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The pay range provided reflects base pay only and in addition certain roles may also be eligible for discretionary Arista bonuses and equity. Employees in Sales roles are eligible to participate in Arista’s Sales Incentive Plan, which pays commissions calculated as a percentage of eligible sales. US-based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location.
#LI-AC1
Additional Information
All your information will be kept confidential according to EEO guidelines.
Arista Networks is an equal opportunity employer. Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law. All your information will be kept confidential according to EEO guidelines.
Source: Arista Networks on SmartRecruiters · View original posting (opens in new tab)
Pay in context
This role's base floor ($133,000) is above 34% of the 2,091 Engineering (non-software) roles in California listed on this site; 3 others list the same floor. Their median floor is $146,800; the middle half runs from $125,000 to $173,500.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.
This listingSenior PCB Design Engineer$133K to $180K
Federal Major Account Manager (Civilian)$132K to $180K
Major Account Manager$130K to $170K
Major Account Manager$130K to $170K
Pre-Sales Systems Engineer - Financial Services$130K to $175K
Hardware Design Integrity Engineer$130K to $225K
Major Account Manager - South/ East Bay$130K to $170K
Chart as a table
| Role | Published base |
|---|---|
| Senior PCB Design Engineer (this listing) | $133K - $180K |
| Federal Major Account Manager (Civilian) | $132K - $180K |
| Major Account Manager | $130K - $170K |
| Major Account Manager | $130K - $170K |
| Pre-Sales Systems Engineer - Financial Services | $130K - $175K |
| Hardware Design Integrity Engineer | $130K - $225K |
| Major Account Manager - South/ East Bay | $130K - $170K |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-09-02
Where this pay comes from
Location as the employer wrote it: Santa Clara, CA, United States
The new hire base pay for this role has a salary range of $133,000 to $180,000. Arista offers different pay ranges based on work location,
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
