Six Figure Work

ASIC Clocks Verification Engineer - New College Grad 2026

NVIDIA

Company websitenvidia.com (NVIDIA, opens in new tab)

Base salary $116,000  to $189,750

Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA

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  • LocationSanta Clara, CA
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (48 min ago) · observed since

About this job

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today.

The GPU clocks group is looking for an exceptional ASIC Clocks Verification Engineer. The team is responsible for crafting all aspects of GPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts with the floor-planning and back-end team to help craft the physical floorplan of the chip. The team explains the programming model to the SW team to come up with an efficient clock programming sequence. The team works with the silicon solution team to triage silicon or programming bugs in the lab.

What you'll be doing:

  • As a Clocks team member, you will be collaborating with other architects, ASIC designers and verification engineers to verify high frequency clock structures.

  • Be able to engage with multiple teams and design the GPU clock structure to satisfy all the architectural constraints.

  • Your understanding of general verification principles will be valuable to verify the clocks design.

  • Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to improve the productivity of the above teams.

  • Collaborate with Software and product group to debug GPU clock silicon bugs in our new products.

  • Understand and design clocking structures to overcome sub-micron design challenges.

  • You will also identify improvements in the current design and propose and implement new ways to improve the efficiency in the GPU clocking design.

What we need to see:

  • A Master’s degree in Electrical Engineering (or equivalent experience).

  • Practical experience with SystemVerilog and Universal Verification Method (UVM).

  • Experience with Design Verification, Logic Design, and Logic Synthesis.

  • Strong coding skills in Python, Perl, or other industry-standard scripting languages.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? If so, we want to hear from you.

#LI-Hybrid

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 116,000 USD – 189,750 USD.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Source: NVIDIA on Workday · View original posting (opens in new tab)

Pay in context

This role's base floor ($116,000) is above 15% of the 3,579 Engineering (non-software) roles in California listed on this site; 24 others list the same floor. Their median floor is $147,000; the middle half runs from $125,000 to $173,000.

Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 8, 2026.

This range next to 6 other live NVIDIA roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live NVIDIA roles with the nearest advertised base floor
RolePublished base
ASIC Clocks Verification Engineer - New College Grad 2026 (this listing)$116,000 - $189,750
Global Virtual Card Payment Administrator$116,000 - $195,500
Forward Deployed Engineer - Finance$116K - $230K
Customer Solutions Architect, Applications Engineering$116,000 - $189,750
Senior Revenue Accountant – Revenue Accounting Operations$116,000 - $195,500
ASIC Design Engineer – Clocks IP$116,000 - $218,500
Deep Learning Compiler Verification Engineer$116,000 - $189,750

Same $100K to $400K scale as every card. All NVIDIA roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-10-30
Where this pay comes from

Location as the employer wrote it: US, CA, Santa Clara

base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 116,000 USD – 189,750 USD.

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.

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