ASIC Floorplan Design Engineer - New College Grad 2026
Company websitenvidia.com (NVIDIA, opens in new tab)
Base salary $116,000 to $218,500
Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSanta Clara, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (1 h ago) · observed since
About this job
We are now looking for a ASIC Floorplan Design Engineer - New College Graduate.
NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoC's and GPU's. This position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you will be doing:
Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development.
Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities
Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions.
You will build tools and improve existing infrastructure to optimize chip area and speed of execution.
What we need to see:
Masters Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience.
A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture.
Experience in Verilog, System Verilog or similar HVL
Experience with CAD and physical design methodologies (flow and tool development), chip floorplan, power/clock distribution, packaging, P&R and timing closure.
Strong communication and interpersonal skills and ability & desire to work as a great teammate should be displayed in your interview.
Python, Perl and C/C++ programming language experience
Ways to stand out from the crowd:
Experience in driving development of large scale ASIC floorplan is a huge plus.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. Our products are leading the way with groundbreaking developments in Artificial Intelligence, Autonomous Driving, High-Performance Computing and Visualization. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the fastest and most power efficient chips in their class? If so, we want to hear from you.
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:116,000 USD – 189,750 USD for Level 2; and 136,000 USD – 218,500 USD for Level 3.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Source: NVIDIA on Workday · View original posting (opens in new tab)
Pay in context
This role's base floor ($116,000) is above 15% of the 2,732 Engineering (non-software) roles in California listed on this site; 23 others list the same floor. Their median floor is $147,000; the middle half runs from $125,000 to $175,000.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.
This listingASIC Floorplan Design Engineer - New College Grad 2026$116,000 to $218,500
Global Virtual Card Payment Administrator$116,000 to $195,500
Forward Deployed Engineer - Finance$116K to $230K
Customer Solutions Architect, Applications Engineering$116,000 to $189,750
Senior Revenue Accountant – Revenue Accounting Operations$116,000 to $195,500
ASIC Design Engineer – Clocks IP$116,000 to $218,500
Deep Learning Compiler Verification Engineer$116,000 to $189,750
Chart as a table
| Role | Published base |
|---|---|
| ASIC Floorplan Design Engineer - New College Grad 2026 (this listing) | $116,000 - $218,500 |
| Global Virtual Card Payment Administrator | $116,000 - $195,500 |
| Forward Deployed Engineer - Finance | $116K - $230K |
| Customer Solutions Architect, Applications Engineering | $116,000 - $189,750 |
| Senior Revenue Accountant – Revenue Accounting Operations | $116,000 - $195,500 |
| ASIC Design Engineer – Clocks IP | $116,000 - $218,500 |
| Deep Learning Compiler Verification Engineer | $116,000 - $189,750 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-10-30
Where this pay comes from
Location as the employer wrote it: US, CA, Santa Clara (Levels 2-3 combined)
116,000 USD – 189,750 USD for Level 2; and 136,000 USD – 218,500 USD for Level 3.
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.