CryoCMOS Design Director, Quantum

About GlobalFoundries:

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role:

The CryoCMOS Design Team Manager will lead a multidisciplinary team of approximately 10–20 analog, RF, digital, mixed-signal, and physical design engineers developing advanced cryogenic CMOS ICs and reusable design solutions. This role provides technical and people leadership across the complete IC development lifecycle, from architecture and circuit design through verification, tapeout, silicon characterization, and design-to-silicon correlation

The CryoCMOS Design Team Manager is responsible for building and leading GF's CryoCMOS IC design capability and delivering differentiated integrated circuit solutions for quantum and other advanced applications. The manager will provide technical direction, organizational leadership, and execution ownership while working closely with technology development, PDK, compact modeling, test, packaging, design enablement, customers, and ecosystem partners.

Essential Responsibilities:

• Lead and manage a multidisciplinary CryoCMOS IC design team of approximately 10–20 engineers, establishing technical direction, priorities, resource plans, and execution strategy across analog, RF, digital, mixed-signal, and physical design disciplines.
• Drive end-to-end development of CryoCMOS ICs and reusable design IP, from system and circuit architecture through design, simulation, physical implementation, verification, tapeout, silicon bring-up, and characterization.
• Provide technical leadership for complex IC development, including architecture and design reviews, design methodology, performance optimization, design closure, technical risk identification, and resolution of critical design issues.
• Develop differentiated IC solutions, reusable IP, design methodologies, and enablement capabilities that leverage GF process technologies for cryogenic, quantum, and other advanced applications.
• Partner with PDK, compact modeling, technology development, test, packaging, and design enablement teams to translate process technology capabilities into robust, manufacturable IC solutions and identify design or modeling gaps.
• Establish and continuously improve IC design processes, technical review mechanisms, quality standards, and execution metrics to enable predictable delivery and successful tapeouts.
• Build and develop a high-performing engineering organization through recruiting, coaching, technical mentorship, performance management, succession planning, and development of future technical leaders.
• Collaborate with internal stakeholders, customers, and ecosystem partners to translate system requirements and technology opportunities into design roadmaps, IC architectures, and executable development programs.

Other Responsibilities:

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
• Work and collaborate on other projects and/or assignments as needed.

Required Qualifications:

• Education: Bachelor's degree in Electrical Engineering, Computer Engineering, Microelectronics, Applied Physics, or a related technical field.
• Experience: Minimum 10 years of relevant semiconductor IC design experience, including progressively increasing technical leadership responsibilities.
• Leadership: Demonstrated experience successfully leading and managing IC design teams, preferably multidisciplinary teams spanning analog, mixed-signal, RF, digital, and/or physical design.
• IC Development: Demonstrated experience leading complex IC development through architecture, design, verification, physical implementation, tapeout, silicon bring-up, characterization, and design-to-silicon correlation.
• Technical Expertise: Strong understanding of CMOS IC design, semiconductor devices, design methodologies, physical implementation, verification, PVT variation, parasitic effects, and silicon characterization.
• Execution: Demonstrated ability to manage multiple complex IC development activities, prioritize engineering resources, mitigate technical and program risks, and deliver against schedule.
• People Leadership: Demonstrated ability to recruit, develop, coach, and retain high-performing engineering teams and technical leaders.
• Communication: Ability to communicate complex technical topics, priorities, risks, and recommendations effectively across engineering teams, customers, management, and senior leadership.
• Travel: Up to 10%.
• Fluency in English Language: Written and verbal.

Preferred Qualifications:

• Education: Master's degree or PhD in Electrical Engineering, Microelectronics, Computer Engineering, Applied Physics, or a related field.
• Experience leading IC design organizations of 10 or more engineers, including multidisciplinary analog, RF, mixed-signal, digital, and/or physical design teams.
• Experience with cryoCMOS, quantum-control/readout electronics, low-temperature electronics, or other advanced semiconductor applications.
• Deep technical expertise in at least one IC design discipline, such as analog/mixed-signal, RFIC, digital IC, or high-speed circuit design, combined with sufficient technical breadth to lead multidisciplinary IC development.
• Experience working closely with semiconductor technology development, PDK, compact modeling, EDA, test, packaging, and silicon characterization teams.
• Experience establishing or scaling an IC design capability, including design methodologies, reusable IP, design flows, technical review processes, and tapeout execution practices.
• Experience engaging customers and ecosystem partners to translate system-level requirements into semiconductor technology and IC design solutions.
• Project management skills, including the ability to innovate and execute on solutions that matter and navigate ambiguity.
• Strong written and verbal communication skills.
• Strong planning and organizational skills.

Expected Salary Range

$166,500.00 - $319,000.00

The exact Salary will be determined based on qualifications, experience and location.

The role you are applying for may require you to obtain a US Department of Defense Security Clearance at some time during your employment. Acceptance of this role commits to applying for such if requested. Further, the applicant consents to being asked questions about their citizenship and background to assess the likelihood of obtaining a Security Clearance. The applicant also acknowledges that GlobalFoundries can only nominate and submit an application for a Security Clearance. The granting of a Security Clearance is at the sole discretion of the U.S. Government and the Department of Defense.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at [email protected] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address. 

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations. 

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory. 

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law