Director, System Level Testing - Product Development Engineering
Company websitenvidia.com (NVIDIA, opens in new tab)
Base salary $272,000 to $425,500
Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSanta Clara, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (42 min ago) · observed since
About this job
NVIDIA is seeking an experienced and highly motivated Director of System level Testing to lead the end-to-end post-silicon validation, test architecture, and manufacturing ramp for cutting-edge AI, data center, SOC and Tegra Automotive product lines. In this leadership role, you will guide a team responsible for bringing next-generation GPU/SOC/LPU/Auto/Tegra technologies from design validation through manufacturing ramp and high-volume production.
You will collaborate across design, Silicon Co-design Group, test engineering, reliability, and manufacturing teams to drive yield improvement, test optimization. The ideal candidate combines strong technical depth in CMOS, System Level testing and mixed-signal systems with proven leadership in product development and high-volume semiconductor manufacturing.
What You'll Be Doing:
Lead and mentor a team of product development engineers responsible for validation, characterization, and production ramp of NVIDIA product lines.
Drive product development strategy from early silicon validation through qualification and high-volume manufacturing.
Develop and implement validation methodologies and test strategies for mixed-signal silicon designs.
Partner closely with Mixed-Signal Design, Test Engineering, Reliability, and Manufacturing teams to ensure seamless transition from design to production.
Oversee Product characterization of new integrated circuit designs.
Lead root-cause analysis and complex problem resolution related to silicon performance, yield excursions, and product reliability.
Drive yield improvement initiatives, test time reduction, and manufacturing efficiency across wafer and module test flows.
Provide structured feedback to design teams regarding silicon performance, design margins, and manufacturability improvements.
Establish scalable data analysis frameworks, automation tools, and statistical methodologies for validation and production monitoring.
Collaborate with operations teams to support product qualification, ramp readiness, and high-volume manufacturing scaling.
What We Need to See:
Master’s or Ph.D. in Electrical Engineering, Physics, Computer Engineering, or a related field, or equivalent experience.
15+ years of background in semiconductor product development, testing or manufacturing engineering, including significant leading large, cross-functional technical teams.
5+ years of Director leadership or management experience leading engineering teams.
Strong understanding of CMOS, Component characterization, and analog/mixed-signal circuit behavior.
Experience with high-speed testing, and characterization
Proven experience in yield analysis, product characterization, and silicon debug.
Experience using statistical data analysis tools (e.g., JMP) for engineering insights and yield improvement.
Demonstrated ability to drive cross-functional problem solving under aggressive schedules.
Strong leadership, communication, and organizational skills.
Ways to Stand Out From the Crowd:
Experience developing or productizing SOC, GPU, Automotive
Deep expertise in System Level testing, Voltage-Frequency understanding and manufacturing ramp readiness.
Experience with control loops, feedback systems, and high-speed SerDes/analog front-end validation.
Deep knowledge of advanced CMOS process technologies, multi-chip module (MCM) and high speed interfaces
Experience leading product ramps from prototype to high-volume manufacturing.
With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. This role presents an opportunity to have a wide impact at NVIDIA by improving the factory planning function. Are you creative, hard-working, dedicated, and determined? Do you love a challenge? If so, we want to hear from you!
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 272,000 USD – 425,500 USD.You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Source: NVIDIA on Workday · View original posting (opens in new tab)
This listingDirector, System Level Testing - Product Development Engineering$272,000 to $425,500
Senior Director, Procurement Operations and Systems$272K to $414K
Principal Research Scientist, Synthetic Data Generation$272,000 to $431,250
Senior Manager, AI and HPC Cluster Engineering Enablement$272,000 to $488,750
Senior Engineering Manager, Object Storage - DGX Cloud$272,000 to $431,250
Principal Systems Software Engineer$272,000 to $431,250
Senior Manager, Developer Infrastructure and Build Engineering$272,000 to $431,250
Chart as a table
| Role | Published base |
|---|---|
| Director, System Level Testing - Product Development Engineering (this listing) | $272,000 - $425,500 |
| Senior Director, Procurement Operations and Systems | $272K - $414K |
| Principal Research Scientist, Synthetic Data Generation | $272,000 - $431,250 |
| Senior Manager, AI and HPC Cluster Engineering Enablement | $272,000 - $488,750 |
| Senior Engineering Manager, Object Storage - DGX Cloud | $272,000 - $431,250 |
| Principal Systems Software Engineer | $272,000 - $431,250 |
| Senior Manager, Developer Infrastructure and Build Engineering | $272,000 - $431,250 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-10-30
Where this pay comes from
Location as the employer wrote it: US, CA, Santa Clara
base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 272,000 USD – 425,500 USD.
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
