Six Figure Work

Senior Analog and Mixed Signal Engineer

NVIDIA

Company websitenvidia.com (NVIDIA, opens in new tab)

Base salary $168,000  to $310,500

Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA

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  • LocationSanta Clara, CA
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (33 min ago) · observed since

About this job

Do you want to work on leading-edge problems alongside some of the most forward-thinking people in the world? NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Join our team with varied strengths today!

We are part of the global circuits team at NVIDIA that design the state-of-the-art GPUs for all applications such as supercomputers, gaming consoles and self-driving cars. Our teams focus is on architecture and design of CMOS high-speed chip interfaces and complex analog functions. Come join our dynamic team!

What you’ll be doing:

  • You will work as part of a team to design and implement high speed interfaces and complex mixed-signal circuits using state-of-the-art sub-micron CMOS technologies and various EDA tools:

  • High speed analog and hybrid Phase Locked loops and associated subblocks including VCO, charge-pump, dividers, state machines, LDO, bandgap, TDC, interpolator circuits, high speed buffers etc.

  • Design of data converters (analog-to-digital and digital-to-analog converters). Contribute to architecture development and transistor level circuit design of associated blocks like comparators, digital state machines, high performance op-amps etc.

  • Work closely with mask design engineers to deliver the physical design as well as work with characterization groups for silicon evaluation.

  • Help support technology transfer to product development teams.

  • Your other responsibilities will include architecture studies, circuit designs & simulations, floor-planning, instructing mask designers, reliability verifications and silicon bring-up.

  • If you have a strong ability to learn and explore new technologies and able to demonstrate good analysis and analytical skills, this is the ideal position for you.

What we need to see:

  • BSEE or equivalent experience (MS preferred)

  • 6+ years of industry experience in deep-submicron CMOS technologies. Analytical and intuitive understanding of transistor level analog design, layout and simulation is required.

  • Hands-on design experience in performance analog and hybrid Phase Locked Loops, analog-to-digital (ADC), digital-to-analog (DAC) data converter. Experience in all types of analog subcells is considered, VCO, LDO, bandgap, chargepump, opamps, interpolator circuits. Have experience in deep sub-micron process.

  • Experience with the following is a plus: digital PLL, TDC or DSP and control theory experience related to digital PLLs.

  • Have good experience with simulation tools such as spectre, hspice, AFS, and MATLAB, System Verilog, Python. You are proficient with Cadence custom circuit design tools like ADE-L and ADE-XL.

  • You have understanding and experience in running Monte-Carlo, noise simulations and stability analysis.

  • Capable of understanding DRC and LVS results with verification tools (Calibre, ICV, or like)

  • Proficient in scripting languages like Perl, Python, matlab etc. is a plus.

  • Ability to work effectively in a team, with good interpersonal skills, enthusiasm and positive energy.

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Source: NVIDIA on Workday · View original posting (opens in new tab)

Pay in context

This role's base floor ($168,000) is above 70% of the 3,579 Engineering (non-software) roles in California listed on this site; 85 others list the same floor. Their median floor is $147,000; the middle half runs from $125,000 to $173,000.

Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 8, 2026.

This range next to 6 other live NVIDIA roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live NVIDIA roles with the nearest advertised base floor
RolePublished base
Senior Analog and Mixed Signal Engineer (this listing)$168,000 - $310,500
L11 System Product Development Engineer$168,000 - $258,750
Senior Software Engineer, Network Visibility Platform - DGX Cloud$168K - $322K
Hardware Validation Procedures and Documentation Lead$168,000 - $258,750
Senior Software Engineer, Platform Engineering$168K - $322K
PhD Research Scientist, Fundamental Generative AI - New College Grad 2026$168,000 - $264,500
AI Engineering Manager - Finance$168K - $322K

Same $100K to $400K scale as every card. All NVIDIA roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-10-30
Where this pay comes from

Location as the employer wrote it: US, CA, Santa Clara (Levels 4-5 combined)

168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.

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