Senior Mixed Signal Design Validation Engineer
Company websitenvidia.com (NVIDIA, opens in new tab)
Base salary $168,000 to $310,500
Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSanta Clara, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (1 h ago) · observed since
About this job
NVIDIA's invention of the GPU in 1999 transformed the gaming industry, revolutionized graphics, and sparked the rise of parallel computing. Today, as the driving force behind AI computing, we are leading the charge in creating the technologies that power self-driving cars, robotics, and advanced AI systems. Join us and be at the forefront of technological innovation and equal opportunity company. We are seeking dedicated and hard-working individuals to join NVIDIA team and push the boundaries of what’s possible.
We are looking for an experienced Mixed Signal Design Validation Engineer with a strong background in LPDDR, GDDR, and HBM memory technologies. As part of our high-speed mixed signal circuits team, you will lead the bring-up and characterization of complex interfaces and modules. You will work on validating high-speed I/O systems, focusing on the performance of advanced memory interfaces like LPDDR, GDDR, and HBM, to ensure the highest standards of quality and reliability. This position offers the opportunity to push the boundary of the next generation of memory technologies powering NVIDIA's pioneering GPUs and AI computing platforms.
What You’ll Be Doing:
Lead and drive the creation of validation test plan and test scripts for DDR I/O associated with LPDDR, GDDR, and HBM memory interfaces, ensuring all necessary required analog and digital circuits are covered.
Conduct thorough characterization of analog, digital, and mixed-signal circuit blocks under varying conditions (process, voltage, temperature) and correlate results with simulations.
Drive system-level validation for memory interfaces, ensuring high-speed performance and quality metrics meet the demanding standards required by our GPU and AI systems.
Investigation validating Memory I/O circuit to understand circuit weakness paving ways circuit improvement, architecture enhancement in future products.
Lead debugging efforts and design creative solutions to resolve unexpected bugs.
Validate silicon performance, quality, and margins for refinement of memory interface designs.
Develop and implement test scripts to optimize DDR I/O circuit, sub-circuits and overall system performance
Work closely with multi-functional teams, including Mixed signal design, PISI team, hardware, firmware, and Memory qualification engineer, to resolve issues and improve the performance for memory interfaces.
Develop and implement tools and scripts to enhance electrical characterization and chip bring-up processes.
Mentor and train new engineers on validation practices, encouraging a culture of excellence and continuous improvement.
What We Need to See:
A BS degree or equivalent experience with 8 years experience or higher in Electrical Engineering, Computer Engineering, or a related field.
Solid experience in silicon bring-up and debugging, particularly for high-speed memory interfaces
Strong understanding of Memory system and specifications.
In-depth technical knowledge of mixed-signal circuits, analog, and digital systems, with a specific focus on high-speed memory technologies.
Strong knowledge of signal integrity and power integrity.
Experience with lab instrumentation, such as oscilloscopes, logic analyzers, spectrum analyzer, TDR, phase noise analyzer, signal generators and BER tester.
Strong scripting skills in Python, C, or similar languages, with experience in Git and JMP for version control and data analysis.
Ability to work in a fast-paced, dynamic environment that involves multiple-chip bring-ups and system validations.
Tight-knit collaboration are required to work effectively with multi-functional teams.
Strong problem-solving skills, with a proactive and forward-thinking approach.
Ways to Stand Out from the Crowd:
Need strong expertise in measurement theory and the use of test instruments, especially in the context of memory interface validation. Knowledge of other high-speed transceiver performance is a must.
NVIDIA is renowned as the leader in AI computing and one of the world’s most innovative and desirable employers. MSDV team consists of individuals who demonstrate outstanding creativity and critical thinking skills, driving innovation forward. If you're passionate, creative, and eager to work on the cutting edge of technology, this is the perfect team for you.
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Source: NVIDIA on Workday · View original posting (opens in new tab)
Pay in context
This role's base floor ($168,000) is above 69% of the 3,589 Engineering (non-software) roles in California listed on this site; 85 others list the same floor. Their median floor is $147,000; the middle half runs from $125,000 to $173,075.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.
This listingSenior Mixed Signal Design Validation Engineer$168,000 to $310,500
L11 System Product Development Engineer$168,000 to $258,750
Senior Software Engineer, Network Visibility Platform - DGX Cloud$168K to $322K
Hardware Validation Procedures and Documentation Lead$168,000 to $258,750
Senior Software Engineer, Platform Engineering$168K to $322K
PhD Research Scientist, Fundamental Generative AI - New College Grad 2026$168,000 to $264,500
AI Engineering Manager - Finance$168K to $322K
Chart as a table
| Role | Published base |
|---|---|
| Senior Mixed Signal Design Validation Engineer (this listing) | $168,000 - $310,500 |
| L11 System Product Development Engineer | $168,000 - $258,750 |
| Senior Software Engineer, Network Visibility Platform - DGX Cloud | $168K - $322K |
| Hardware Validation Procedures and Documentation Lead | $168,000 - $258,750 |
| Senior Software Engineer, Platform Engineering | $168K - $322K |
| PhD Research Scientist, Fundamental Generative AI - New College Grad 2026 | $168,000 - $264,500 |
| AI Engineering Manager - Finance | $168K - $322K |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-10-30
Where this pay comes from
Location as the employer wrote it: US, CA, Santa Clara (Levels 4-5 combined)
168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
