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Silicon Photonics Test Engineer

Intel

Company websiteintel.com (Intel, opens in new tab)

Base salary From $122,440

Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA

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  • LocationSanta Clara, CA
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (1 h ago) · observed since

About this job

Job Details:

Job Description: 

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

The team is seeking an experienced Silicon Photonics Test engineer for the development of Photonics Integrated Circuits (PIC), sub-system, reference module test stations to characterize and validate PIC, EIC and system performance. The candidate will be expected to collaborate with a cross functional product development team - HW, FW, PIC, EIC, Packaging and thermal, Optics and NPI.

Job Responsibilities:

  • Develop, own, and execute comprehensive validation for Silicon Photonics products, including Photonic Integrated Circuits (PICs), Electrical Integrated Circuits (EICs), Optical sub-systems, Reference modules and advanced optical interconnect platforms.
  • Develop software and automation to control: VNAs, LCAs, AWGs, Oscilloscopes, Bit-error-rate testers, SMUs, Optical instrumentation.
  • Perform detailed characterization of Silicon Photonics devices, including Modulators, Photodetectors, Integrated lasers, Optical engines with RF Driver, TIA and ADC/DACs.
  • Characterize and validate the performance of 100G/lane and 200G/lane PAM4 Transmitters and Receivers, FRO/LRO/LPO Modules, Near-Packaged Optics (NPO)
  • Collect and analyze Small-signal performance, Large-signal performance, BER performance, Eye diagrams.
  • Cross-Functional Engineering Collaboration: Partner with teams spanning Silicon Photonics design, RFIC development, Packaging and thermal design, Firmware development, Manufacturing test, NPI and product engineering,
  • Support subsystem integration activities and drive technical problem-solving across multiple engineering disciplines.
  • Generate validation reports and clearly communicate findings and recommendations to development teams and leadership.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:
Bachelors & 4+ years of experience OR Masters & 3+ years of experience OR PhD & 0 years in Electrical Engineering or STEM related field.
 

3+ years of hands-on experience testing and validating Silicon Photonics devices, RFICs, or optical communication subsystems.

Experience working with:

  • Photonic Integrated Circuits (PICs), RF probes and probe stations, Evaluation-board-based optical subsystems, High-speed electrical and optical measurement equipment.
  • Experience testing optoelectronic devices, including Lasers, Modulators, Photodetectors, Optical interconnect technologies.
  • Experience developing automated test environments and data collection.
  • Strong programming skills for instrument control, automation, and data processing.
  • Experience using Python and data analytics tools for characterization and reporting.
  • Experience working with: VNA/LCA platforms, AWGs, DCAMs, High-speed oscilloscopes, Optical test equipment.
  • Experience performing RF probe calibration using calibration substrates and advanced measurement methodologies.

Preferred skills:

  • Experience with 100G/lane PAM4, 200G/lane PAM4 DSP, RF Driver/TIA, uControllers, DACs, ADCs, Power supplies, SMUs etc.
  • Python, C++ or equivalent software platform.
  • Laboratory optical and electrical measurement skills.
  • Use of AI tools for code generation, debug and deployment.
  • Expertise in physics of opto-electronics devices and RFICs that drive opto devices.
  • Require demonstrated programming skills to control and automate evaluation boards and test instruments.
  • Needs to be comfortable using such equipment to create test platforms.
  • Strong communication and presentation skills.
  • Experience with optical transceiver test and calibration methodologies.
  • Understand electrical and optical requirements and specifications of optical transceiver MSA. Like 800G DR8/2xFR4, 1.6T DR8/2xFR4, 800G LPO, 1.6T LRO etc.
     

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Source: Intel on Workday · View original posting (opens in new tab)

Pay in context

This role's base floor ($122,440) is above 22% of the 2,096 Engineering (non-software) roles in California listed on this site; 6 others list the same floor. Their median floor is $146,200; the middle half runs from $124,000 to $174,250.

Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.

This range next to 6 other live Intel roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live Intel roles with the nearest advertised base floor
RolePublished base
Silicon Photonics Test Engineer (this listing)From $122,440
EHS EngineerFrom $120,860
Module EngineerFrom $120,860
Process Integration Development EngineerFrom $120,860
Global Construction EHS EngineerFrom $120,860
Quality And Reliability EngineerFrom $120,860
New Mexico Wafer Packaging Manufacturing Advanced Packaging Die Pick Engineering Group LeaderFrom $120,860

Same $100K to $400K scale as every card. All Intel roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-09-17
Where this pay comes from

Location as the employer wrote it: US, California, Santa Clara

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.