Six Figure Work

Design Engineer II

Silicon Labs

Company websitesilabs.com (Silicon Labs, opens in new tab)

Base salary $101,500  to $188,500

Employer-published annual base salary, USD. Advertised base range in Austin, TX

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  • LocationAustin, TX
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (1 h ago) · observed since

About this job

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.

Digital Design Engineer II   
Austin, TX 

The Role 
As a Digital Design Engineer II you will develop world class, highly integrated, low power, System on a Chip devices to serve the IoT wireless market.  
 
Responsibilities 

  • Develop complex SoC/chip Architectures with multiple processors, digital and mixed signal subsystems, multiple power, and clock domains with a goal towards optimizing power for specific customer scenarios. 
  • RTL design of modules through System Verilog HDL coding, adhering to quality standards. 
  • Prepare and hold architecture, design, and verification reviews with technical staff throughout project lifecycle 
  • SoC level configuration and integration of digital and mixed-signal IPs.  Examples include embedded processors, memory and controllers, busses, power and clocking systems, security systems, machine learning, radio systems, analog IP, and pads. 
  • Perform logic synthesis, full chip timing and power analysis to optimize designs for key customer scenarios. 
  • Experience in working with backend team to optimize design for power performance and area. 
  • Pre-silicon verification utilizing a combination of block/chip-level test benches. 
  • Validation/bring-up of designs on silicon, providing support to cross-functional teams 

Skills You Will Need   

Minimum Qualifications:   

  • Master’s degree in Electrical Engineering 
  • 3-5 years of professional experience in digital CMOS IC design 
  • Verilog RTL design with demonstrated experience of taking designs through the silicon development lifecycle to production 
  • Knowledge of embedded processor systems and C coding 
  • Experience with logic simulators for both RTL and gate-level simulation, design/waveform browsers, and power analysis tools 
  • Experience with logic synthesis and timing constraints 
  • Experience in working with analog and mixed signal designs, to support design integration and verification of these subsystems in SOC. 
  • Experience with scripting and automation.  Knowledge of Python, Perl, and Tcl 
  • Experience with revision control and configuration management systems (such as Perforce, Git, Methodics) 
  • Excellent written and verbal communications skills 
  • Demonstrated ability to generate high output in a self-driven manner 
  • Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making

Benefits & Perks  

You can look forward to the following benefits: 
   

  • Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans 
  • Highly competitive salary 
  • 401k plan with match and Roth plan option 
  • Equity rewards (RSUs) 
  • Life/AD&D and disability coverage 
  • Flexible spending accounts 
  • Adoption assistance 
  • Back-Up childcare 
  • Additional benefit options (Commuter benefits, Legal benefits, Pet insurance) 
  • Flexible PTO schedule 
  • 3 paid volunteer days per year 
  • Charitable contribution match 
  • Tuition reimbursement 
  • Free downtown parking 
  • Onsite gym 
  • Monthly wellness offerings 
  • Free snacks 
  • Company updates with our CEO 

#LI-KB1 

#LI-Hybrid 

The annualized base pay range for this role is expected to be between $101,500 - $188,500 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.

Source: Silicon Labs on Workday · View original posting (opens in new tab)

How this pay compares

Base floor $101,500. The employer's range is $87,000 wide, 86% of the floor. Observed open for 3 days so far (since Nov 5, 2026).

How Silicon Labs pays

This is the lowest base floor among Silicon Labs's 14 live roles on this site (shared with 1 other). Across them the median floor is $124,600; the middle half runs from $102,638 to $124,600.

Base floors of Silicon Labs's 14 live roles

Base floors of Silicon Labs's 14 live roles$100K to $125K: 78.6% (11); $125K to $150K: 7.1% (1); $150K to $175K: 7.1% (1); $175K to $200K: 7.1% (1)0%20%40%60%80%79%1007%1257%1507%175This job $102K
Each bar counts this employer's live roles by published base floor, in $K. The marker is this job's floor.
Table
Base floors of Silicon Labs's 14 live roles
Floor bandShareRoles
$100K to $125K78.6%11
$125K to $150K7.1%1
$150K to $175K7.1%1
$175K to $200K7.1%1
How this is calculated
Statistic
Employer base floor distribution
Formula
count of the employer's open roles in each $25K band of published base floor / its open roles
Denominator
14 open public roles at this employer
Sample size
14
Hidden when
this employer has fewer than 5 roles
Calculation version
jobpage-analysis-v1
Data as of
current
Employer set
Open jobs on this site that publish a base salary of $100,000 or more
This range next to 6 other live Silicon Labs roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live Silicon Labs roles with the nearest advertised base floor
RolePublished base
Design Engineer II (this listing)$101,500 - $188,500
Software Engineer II$101,500 - $188,500
Senior Software Engineer - IoT Embedded Software (Matter)$102,550 - $190,450
Senior Product Test Engineer$102,550 - $190,450
RF Validation Engineer II$102,900 - $191,100
Staff Field Applications Engineer$120,750 - $224,250
Senior Hardware Product Manager - IoT Wireless$124,600 - $231,400

Same $100K to $400K scale as every card. All Silicon Labs roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
  3. Stopped meeting the published-salary criteria
  4. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-11-04
Where this pay comes from

Location as the employer wrote it: Austin

The annualized base pay range for this role is expected to be between $101,500 - $188,500 USD. Actual base pay could vary based on factors including

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.

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