Emulation Front-End Infrastructure Engineer
Company websitenvidia.com (NVIDIA, opens in new tab)
Base salary $136,000 to $264,500
Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSanta Clara, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (35 min ago) · observed since
About this job
NVIDIA has been pioneering accelerated computing for more than two decades—from the invention of the GPU to breakthroughs in AI, high-performance computing, robotics, autonomous vehicles, and gaming. Our Emulation Infrastructure team builds scalable hardware development platforms and compilation flows that enable pre-silicon validation of NVIDIA’s most complex designs.
We are now looking for a Emulation Front-End Infrastructure Engineer to join our team onsite in Santa Clara, CA.
What you’ll be doing:
Own and evolve front-end compilation, synthesis, and flow infrastructure for NVIDIA hardware emulation platforms.
Develop, maintain, and automate robust compilation and synthesis flows using scripting and industry-leading EDA tools.
Run, analyze, and debug regular compilation and synthesis regressions; help maintain RTL design stability in close partnership with logic designers.
Explore and apply AI techniques to improve flow automation, triage compilation failures, identify recurring failure patterns, and accelerate root-cause analysis.
Evaluate, deploy, and support EDA tools and methodologies for front-end implementation and emulation compilation.
Diagnose complex compilation, elaboration, synthesis, and implementation issues, working closely with internal design teams and EDA vendors.
Improve flow performance, reliability, scalability, usability, and observability across a large-scale hardware development environment.
What we need to see:
A BS degree in Electrical Engineering, Computer Engineering, or a related field (or equivalent experience) with 5+ years of relevant experience; or an MS degree in a related field with 3+ years of relevant experience.
Experience with RTL compilation, synthesis, front-end design implementation, and flow automation.
Working proficiency in Verilog and SystemVerilog, including the ability to read, debug, and modify RTL for emulation needs.
Strong understanding of RTL elaboration, synthesis, logic optimization, and front-end design methodologies.
Hands-on experience with front-end synthesis and compilation EDA tools, including Synopsys Design Compiler, ZeBu Compiler, and Cadence HDL-ICE.
Strong automation and scripting skills in Python, Perl, Tcl, shell scripting, and Makefile-based flows.
Experience running high volumes of jobs on distributed compute farms using workload schedulers such as LSF or Slurm, and using revision-control systems such as Perforce or Git.
Strong debugging, problem-solving, communication, and cross-functional collaboration skills.
Ways to stand out from the crowd:
Experience with hardware-emulation compilation flows and runtime bring-up or debugging is a plus!
Deep expertise with Synopsys Design Compiler, ZeBu Compiler, and Cadence HDL-ICE.
Experience building scalable regression, reporting, monitoring, and flow-debug infrastructure.
Experience building AI/LLM agents or automation that can classify tool logs, diagnose failures, and drive automated recovery.
Experience partnering directly with EDA vendors to resolve complex tool, methodology, or performance issues.
NVIDIA is widely recognized as one of the technology industry’s most desirable employers. Join NVIDIA’s Emulation Infrastructure team to build scalable, reliable compilation flows that enable pre-silicon validation and accelerate innovation across AI, robotics, autonomous driving, gaming, and high-performance computing.
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Source: NVIDIA on Workday · View original posting (opens in new tab)
Pay in context
This role's base floor ($136,000) is above 15% of the 4,310 Software Engineering roles in California listed on this site; 7 others list the same floor. Their median floor is $176,000; the middle half runs from $149,100 to $202,750.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.
This listingEmulation Front-End Infrastructure Engineer$136,000 to $264,500
Public Sector Program Support$136K to $276K
Senior Package Layout Engineer - Hardware$136,000 to $258,750
Senior RMA Customer Experience Manager$136,000 to $212,750
Go-to-Market Product Manager$136,000 to $258,750
Senior PR Manager, Datacenter Architecture$136,000 to $270,250
Senior Technical Program Manager - Tegra$136K to $276K
Chart as a table
| Role | Published base |
|---|---|
| Emulation Front-End Infrastructure Engineer (this listing) | $136,000 - $264,500 |
| Public Sector Program Support | $136K - $276K |
| Senior Package Layout Engineer - Hardware | $136,000 - $258,750 |
| Senior RMA Customer Experience Manager | $136,000 - $212,750 |
| Go-to-Market Product Manager | $136,000 - $258,750 |
| Senior PR Manager, Datacenter Architecture | $136,000 - $270,250 |
| Senior Technical Program Manager - Tegra | $136K - $276K |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-10-30
Where this pay comes from
Location as the employer wrote it: US, CA, Santa Clara (Levels 3-4 combined)
136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4.
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
