Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization
Company websitebroadcom.com (Broadcom, opens in new tab)
Base salary $150,800 to $241,200
Employer-published annual base salary, USD. Advertised base range in United States
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationUnited States
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (1 h ago) · observed since
All 4 locations
- USA-TX-Austin - River Place B7
- USA-California-San Jose-1320 Ridder Park Drive
- USA-CA Irvine Alton Parkway Bldg 2
- USA-CA Irvine Alton Parkway Bldg 1
About this job
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Job Description:
Infrastructure AI/ML Engineer for Memory Design, Characterization,
and Yield Optimization
Job Description
The Central Engineering Group is seeking an energetic, visionary, and passionate Infrastructure AI/ ML Engineer to lead the Agentic AI Infrastructure development workflow for memory design, characterization, and yield optimization.
In this role, you will collaborate with memory designers and DFT experts to build Agentic AI workflows that drive the development of state-of-the-art embedded memories optimized for PPA, DFT, and yield.
Minimum Education & Experience Qualifications
● Experience: 15+ years of progressive, relevant experience in Memory design, DFT, Silicon Yield Analysis, software architecture and AI systems engineering.
● Education: Master’s degree or Ph.D. in Electrical Engineering or Computer Engineering.
Key Job Responsibilities
● Conceptualize, architect, deploy, and scale robust, distributed multi-agent AI frameworks tailored to transform intricate memory design workflows optimized for performance, power, area, and yield
● Orchestrate long-horizon, autonomous agent executions capable of managing multi-step reasoning, task decomposition, and decision-making across all phases of memory design development, silicon bring-up, and yield analysis
● Seamlessly integrate Large Language Model (LLM)-driven agent pipelines with core Electronic Design Automation (EDA) suites, custom in-house software tools, and enterprise data repositories.
● AI-Driven Debug: Develop and deploy ML models to automate the classification of scan failures (Chain, Stuck-at, Transition) and correlate them with design-for-test (DFT) structures.
● Predictive Yield Modeling: Integrate high-dimensional data—including Fab process parameters, PCM (Process Control Monitoring), and E-test data—to predict yield excursions before they hit the assembly line.
● Partner collaboratively with Memory Design Leads, EDA Tool Specialists, and Infrastructure Engineers to distill complex, domain-specific hardware engineering methodologies into modular, goal-driven agentic workflows.
● Align AI workflow capabilities directly with organizational efficiency targets and technical milestones across the Central Engineering Group.
Required Skillset & Technical Competencies
● Memory Design, Characterization and Yield Analysis:
● Experience designing and characterizing embedded memory in advanced technology process nodes
● Experience in compute-in-memory design and architecture
● AI Engineering & Multi-Agent Expertise:
● Experience architecting production-grade LLM applications: multi-agent orchestration,
function-calling/tool-use, and retrieval-augmented generation (RAG).
● Experience integrating agentic systems with enterprise tools, services, and knowledge sources – including building and consuming Model Context Protocol (MCP) servers, and packaging reusable agent capabilities (e.g., Agent Skills).
● Deep experience with agent orchestration frameworks such as LangGraph.
● Semiconductor Domain Knowledge & EDA Tooling:
● Fundamental grasp of chip design methodologies, IP block development lifecycles, and verification environments.
● Hands-on familiarity with industry-standard EDA tooling and frameworks
from Synopsys, Cadence, and Siemens EDA, alongside System Verilog & UVM verification environments.
● Software Engineering & Infrastructure Mastery:
● High proficiency in core programming languages and system design concepts, specifically Python and TCL.
● Expertise in microservices architecture, REST APIs, Docker, Kubernetes, Sandboxing, and config-driven workflow orchestration engine design.
● AI System Verification & Data Engineering:
● Proven experience establishing evaluation metrics, testing benchmarks, and safety guardrails for non-deterministic AI systems in high-stakes environments.
● Technical depth in Vector Databases, and cloud-native containerized orchestration pipelines.
Compensation and Benefits
The annual base salary range for this position is USD 150,800.00 To USD 241,200.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Source: Broadcom on Workday · View original posting (opens in new tab)
Pay in context
This role's base floor ($150,800) is above 41% of the 4,592 Data & ML roles nationwide listed on this site; 1 other lists the same floor. Their median floor is $165,000; the middle half runs from $135,000 to $198,180.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 8, 2026.
This listingInfrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization$150,800 to $241,200
Senior Manager, International Tax$146,900 to $235,000
R&D Engineer IC Design 5$143,800 to $230,000
DFT Lead Engineer$143,800 to $230,000
Principal Physical Design Engineer$143,800 to $230,000
Staff Software Engineer$143,800 to $230,000
R&D Engineer Software 5$143,800 to $230,000
Chart as a table
| Role | Published base |
|---|---|
| Infrastructure AI/ML Engineer for Memory Design, Characterization, and Yield Optimization (this listing) | $150,800 - $241,200 |
| Senior Manager, International Tax | $146,900 - $235,000 |
| R&D Engineer IC Design 5 | $143,800 - $230,000 |
| DFT Lead Engineer | $143,800 - $230,000 |
| Principal Physical Design Engineer | $143,800 - $230,000 |
| Staff Software Engineer | $143,800 - $230,000 |
| R&D Engineer Software 5 | $143,800 - $230,000 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-10-14
Where this pay comes from
Location as the employer wrote it: Multiple locations (4)
The annual base salary range for this position is USD 150,800.00 To USD 241,200.00
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
