Six Figure Work

Quantum Analog IC Design Engineer

GlobalFoundries

Company websitegf.com (GlobalFoundries, opens in new tab)

Base salary $143K  to $275K

Employer-published annual base salary, USD. Advertised base range in Austin, TX +1 more

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  • LocationAustin, TX +1 more
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (1 h ago) · observed since
All places named
  • Austin, TX
  • Santa Clara, CA

About this job

About GlobalFoundries: 

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. 


Summary of Role: 

GlobalFoundries is seeking a Principal Analog Design Engineer to develop advanced analog and mixed-signal integrated circuits and reusable IP for emerging semiconductor applications, including cryogenic CMOS and quantum systems. This role will drive designs from circuit architecture through tapeout and silicon validation while partnering closely with technology, PDK, modeling, layout, and test teams. 


Essential Responsibilities: 

• Design and develop high-performance analog and mixed-signal CMOS circuits and reusable IP, including amplifiers, bias and reference circuits, regulators, data converters, oscillators, PLLs, clocking circuits, and drivers. 

• Own circuit development from architecture and transistor-level design through simulation, layout supervision, physical verification, tapeout, silicon characterization, and design-to-measurement correlation. 

• Perform comprehensive circuit analysis across process, voltage, and temperature, including Monte Carlo/mismatch, noise, stability, linearity, timing, and post-layout parasitic simulations. 

• Optimize circuit performance across operating temperature ranges, including cryogenic conditions, power constraints, process variation, device behavior, and layout-dependent effects. 

• Collaborate with device modeling and PDK teams to assess model accuracy, identify model or design-rule gaps, and provide circuit-level feedback supporting cryogenic and advanced PDK development and validation. 

• Drive analog layout requirements and reviews for device matching, common-centroid structures, shielding, isolation, parasitic management, signal integrity, power integrity, and design for manufacturability. 

• Define silicon test structures and characterization plans, analyze measured data, debug performance issues, and correlate hardware results with pre-silicon simulation and compact models. 

• Lead technical design reviews, document design methodology and results, mentor engineers, and collaborate with cross-functional internal and external teams to enable customer and technology solutions. 


Other Responsibilities: 

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. 


Required Qualifications: 

• Education - Bachelor’s degree in Electrical Engineering, Microelectronics, Computer Engineering, Applied Physics, or a related field. 

• Experience - Minimum 8 years of relevant analog or mixed-signal integrated circuit design experience. 

• Skills - Demonstrated experience taking analog or mixed-signal circuits through schematic design, simulation, layout, DRC/LVS, parasitic extraction, tapeout, and silicon validation. 

• Skills - Strong knowledge of CMOS analog design fundamentals, including device physics, noise, matching, feedback, stability, frequency response, process variation, and PVT/Monte Carlo analysis. 

• Skills - Proficiency with industry-standard analog IC design, SPICE simulation, layout, physical verification, and post-layout extraction environments. 

• Skills - Ability to independently analyze complex circuit and silicon performance issues and translate results into design improvements. 

• Travel - Up to 10%. 

• Fluency in English Language - written & verbal. 


Preferred Qualifications: 

• Education - Master’s degree or PhD in Electrical Engineering, Microelectronics, or a related field. 

• Experience - Experience with cryogenic CMOS, low-temperature circuit design or characterization, quantum-control electronics, precision instrumentation, RF, or other advanced analog applications. 

• Skills - Familiarity with CMOS device behavior and compact-model limitations at cryogenic temperatures. 

• Skills - Experience designing advanced analog/mixed-signal blocks such as ADCs/DACs, PLLs, LNAs, VGAs, oscillators, voltage/current references, LDOs, or high-speed drivers. 

• Skills - Experience with silicon characterization and correlation of measured results to simulation, including interactions with device modeling, PDK, process technology, or test teams. 

• Skills - Familiarity with design or characterization automation using Python, SKILL, Tcl, or equivalent scripting languages. 

• Project management skills - i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity. 

• Strong written and verbal communication skills. 

• Strong planning & organizational skills. 

Expected Salary Range

$143,000.00 - $275,000.00

The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at [email protected] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address. 

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations. 

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory. 

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law 

Source: GlobalFoundries on Workday · View original posting (opens in new tab)

This range next to 6 other live GlobalFoundries roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live GlobalFoundries roles with the nearest advertised base floor
RolePublished base
Quantum Analog IC Design Engineer (this listing)$143K - $275K
Sr Principal Engineer Business Development (NAM)$143K - $275K
Sr Mgr/Deputy Director, Aerospace & Defense End Market$143K - $275K
Sr. Manager / Deputy Director - Facilities / Construction Management$143K - $247K
Customer Program Manager - Custom Silicon/SoC$143K - $247K
Quantum Ion Trap Lead Integrator$143K - $247K
Technology Architect – Silicon Spin Quantum Platforms$143K - $247K

Same $100K to $400K scale as every card. All GlobalFoundries roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-09-28
Where this pay comes from

Location as the employer wrote it: Austin • Santa Clara

$143,000.00 - $275,000.00

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.