Six Figure Work

Senior ASIC Design Engineer

NVIDIA

Company websitenvidia.com (NVIDIA, opens in new tab)

Base salary $136,000  to $264,500

Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA +1 more

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  • LocationSanta Clara, CA +1 more
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (18 min ago) · observed since
All places named
  • Santa Clara, CA
  • California

About this job

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today.


NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading GPU and SoC's. With the System-ASIC team, you will contribute to designing multiple products that will be used in a variety of applications from consumer graphics to self-driving cars and the growing field of artificial intelligence. System-ASIC team works closely with System Architecture team on product definitions, implements new innovative flows to improve our chip yield and to address multiple sectors, defines Reset and Boot Architecture and implements them in complex GPU and Tegra chips. The team is also handling the architecture, design, and synthesis of multiple System-level modules.


What you’ll be doing:

  • Be an integral part of the System ASIC Design team to help develop and improve our RTL and SOC designs

  • Collaborate with architects, ASIC designers, and verification engineers to design sophisticated system-level modules such as Floorsweep, In-silicon measurement, Reset and Boot controllers.

  • You will be responsible for the RTL design, logic synthesis, and timing analysis of several modules.

  • Integrate modules into the overall SOC design and work closely with other teams in the silicon bring-up process and ensure successful SOC level integration.

  • You will also use your expertise to identify and implement improvements in the current design flow and methodologies to improve efficiency and quality.
     

What we need to see:

  • BS / MS in Microelectronics/ Electronic Engineering/ Computer Science and related (or equivalent experience).

  • 5+ years of ASIC design experience or SOC integration design / flow experience

  • Fundamental digital design concepts and experience in ASIC design flow including RTL design, verification, logic synthesis and timing analysis

  • Strong coding skills in Perl, Python, C++, or other industry-standard scripting languages

  • Basic understanding of verification methodology

  • Excellent analytical and problem-solving skills and attention to detail.
     

Ways to stand out from the crowd:

  • Familiarity with ARM CPU and SoC system architecture, microprocessor, and microcontroller fundamentals (caches, buses, memory controllers, DMA, etc.)

  • Experience with reset controllers, boot, fuse controllers or UCIe protocol

  • Hands-on experience in programming (C/C++) and scripting (Perl/Python).

# LI-Hybrid

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Source: NVIDIA on Workday · View original posting (opens in new tab)

Pay in context

This role's base floor ($136,000) is above 36% of the 2,090 Engineering (non-software) roles in California listed on this site; 21 others list the same floor. Their median floor is $146,900; the middle half runs from $125,000 to $173,750.

Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.

This range next to 6 other live NVIDIA roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live NVIDIA roles with the nearest advertised base floor
RolePublished base
Senior ASIC Design Engineer (this listing)$136,000 - $264,500
Public Sector Program Support$136K - $276K
Senior Package Layout Engineer - Hardware$136,000 - $258,750
Senior RMA Customer Experience Manager$136,000 - $212,750
Go-to-Market Product Manager$136,000 - $258,750
Senior PR Manager, Datacenter Architecture$136,000 - $270,250
Senior Technical Program Manager - Tegra$136K - $276K

Same $100K to $400K scale as every card. All NVIDIA roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-10-30
Where this pay comes from

Location as the employer wrote it: US, CA, Santa Clara • US, CA, Remote (Levels 3-4 combined)

136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4.

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.