Senior Custom ASIC Engineering Lead
Company websitebroadcom.com (Broadcom, opens in new tab)
Base salary $143,800 to $230,000
Employer-published annual base salary, USD. Advertised base range in San Jose Innovation Drive, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSan Jose Innovation Drive, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (1 h ago) · observed since
About this job
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Job Description:
Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, and packaging? Have you taped out so many chips that you can identify potential design problems hidden in EDA reports, advise design teams on how to fix them, and then publish an application note about avoiding them in future? Do you love technical-deep-dive with engineers and providing an eagle’s eye summary to management? If this is your engineering profile and you are looking for a challenge, then we have one for you.
Broadcom develops critical Infrastructure chips that enable a variety of Customers to produce ASICs in almost all major segments of the Semiconductor industry, including AI. Our ASIC Products Division is looking for a senior engineer to guide customer teams designing challenging chips in areas such as AI, HPC, networking and storage. This is an immensely responsible position, and an opportunity to push the frontiers of technology by working with cross-functional teams inside and outside of Broadcom.
As a valued member of this team, you will be required to do the following:
Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design, test, packaging, fabrication, bring-up and production
Advise customers on best practices in EDA, flows and design methodologies, and by organizing Q&A sessions with Broadcom technology experts
See ahead, plan ahead, work ahead. Proactively assess potential risks to the design quality and project schedule, then work with cross-functional teams to prepare and execute risk mitigation actions
Execute physical design flows to check that incoming customer tape-in netlists meet Broadcom’s stringent tape-out quality standards
Motivate and drive yourself to stay abreast of developments in Broadcom IPs, technology and end user applications
Participate in discussions about your chips with marketing, sales, legal and regulatory compliance teams
Be a consummate team player and assist other teams in need
You must have these proven skills to qualify for this position:
Multiple tape-outs in advanced technology nodes
Analyze PPA tradeoffs involved amongst various library components, and architectures
Knowledgeable in low power design and power management
Hands-on experience in physical design and STA, EDA tools, design flows for physical design, logic simulation, test, and packaging
Programming in TCL, shell and scripting languages
The following skills are nice to have:
Exposure to SERDES communications protocols.
Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design verification, DRC, logic synthesis
Knowledge of DFT methods including scan, memory BIST and repair
Education and Experience Requirements:
Bachelors degree and 12+ years of related experience; or Masters degree and 10+ years of related experience
Compensation and Benefits
The annual base salary range for this position is USD 143,800.00 To USD 230,000.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Source: Broadcom on Workday · View original posting (opens in new tab)
Pay in context
This role's base floor ($143,800) is above 58% of the 4,283 Engineering (non-software) roles nationwide listed on this site; 13 others list the same floor. Their median floor is $136,500; the middle half runs from $116,800 to $160,000.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.
This listingSenior Custom ASIC Engineering Lead$143,800 to $230,000
R&D Engineer IC Design 5$143,800 to $230,000
DFT Lead Engineer$143,800 to $230,000
Principal Physical Design Engineer$143,800 to $230,000
Staff Software Engineer$143,800 to $230,000
R&D Engineer Software 5$143,800 to $230,000
Physical Design Engineer$143,800 to $230,000
Chart as a table
| Role | Published base |
|---|---|
| Senior Custom ASIC Engineering Lead (this listing) | $143,800 - $230,000 |
| R&D Engineer IC Design 5 | $143,800 - $230,000 |
| DFT Lead Engineer | $143,800 - $230,000 |
| Principal Physical Design Engineer | $143,800 - $230,000 |
| Staff Software Engineer | $143,800 - $230,000 |
| R&D Engineer Software 5 | $143,800 - $230,000 |
| Physical Design Engineer | $143,800 - $230,000 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-07-30
Where this pay comes from
Location as the employer wrote it: USA-CA San Jose Innovation Drive
The annual base salary range for this position is USD 143,800.00 To USD 230,000.00
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
