Six Figure Work

Senior Mask Design Engineer – Hardware

NVIDIA

Company websitenvidia.com (NVIDIA, opens in new tab)

Base salary $136,000  to $258,750

Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA +5 more

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  • LocationSanta Clara, CA +5 more
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (42 min ago) · observed since
All 6 locations
  • US, CA, Santa Clara
  • US, NV, Remote
  • US, OR, Remote
  • US, AZ, Remote
  • US, WA, Remote
  • US, CA, Remote

About this job

NVIDIA’s GPUs and SOCs are the world leaders in power, performance, and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions!
 

This position will collaborate with Package Technical Lead and different design teams in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues.


What you'll be doing:

  • You'll collaborate cross functionally with package technical lead (PTL) and I/O signal integrity and technology engineers to deliver solution for product packages in tight schedule.

  • Performing physical layout for silicon interposer using Cadence tools.

  • Conduct design feasibility studies to evaluate the package design goals for size, cost, and system performance.

  • Take part in studying layout floorplan and perform custom layout and verification against design rules and netlists.

  • Propose layout design trade-offs to the PTL for resolution and implementation.
     

What we need to see:

  • Hold a B.S. Electrical Engineering or equivalent experience

  • Minimum of 5+ years proven experience in Mask and Layout Design.

  • Deep understanding of layout concepts in submicron CMOS technologies.

  • You are an authority with Cadence layout tools - particularly Virtuoso.

  • Knowledge of Integrity auto-routing is a plus.

  • Experience running and debugging with verification tools such as Calibre, ICV, Thunder, etc.

  • Proficient in scripting languages like Perl, Python, Skill, etc.

  • Should have knowledge of DRC and LVS checking flows, ability to customize decks.

  • Knowledge of APD package layout tool is a plus.

  • Good understanding of packaging technology is useful.

  • You can work optimally in a team, good interpersonal skills, passion and positive energy.

NVIDIA is widely considered to be one of the technology world’s most desirable employers! We have some of the most forward-thinking and dedicated people in the world working for us. If you're creative and autonomous, we want to hear from you

#LI-Hybrid

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
136,000 USD – 212,750 USD for Level 3; and 168,000 USD – 258,750 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Source: NVIDIA on Workday · View original posting (opens in new tab)

Pay in context

This role's base floor ($136,000) is above 36% of the 3,589 Engineering (non-software) roles in California listed on this site; 71 others list the same floor. Their median floor is $147,000; the middle half runs from $125,000 to $173,075.

Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 7, 2026.

This range next to 6 other live NVIDIA roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live NVIDIA roles with the nearest advertised base floor
RolePublished base
Senior Mask Design Engineer – Hardware (this listing)$136,000 - $258,750
Public Sector Program Support$136K - $276K
Senior Package Layout Engineer - Hardware$136,000 - $258,750
Senior RMA Customer Experience Manager$136,000 - $212,750
Go-to-Market Product Manager$136,000 - $258,750
Senior PR Manager, Datacenter Architecture$136,000 - $270,250
Senior Technical Program Manager - Tegra$136K - $276K

Same $100K to $400K scale as every card. All NVIDIA roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-10-30
Where this pay comes from

Location as the employer wrote it: Multiple locations (6) (Levels 3-4 combined)

136,000 USD – 212,750 USD for Level 3; and 168,000 USD – 258,750 USD for Level 4.

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.

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