Senior Principal FPGA Engineer

Business Unit:

Cubic Defense

Company Details:

When you join Cubic, you become part of a company that creates and delivers technology solutions in transportation to make people’s lives easier by simplifying their daily journeys, and defense capabilities to help promote mission success and safety for those who serve their nation. Led by our talented teams around the world, Cubic is committed to solving global issues through innovation and service to our customers and partners.

We have a top-tier portfolio of businesses, including Cubic Transportation Systems (CTS) and Cubic Defense (CD). Explore more on Cubic.com.

Job Details:

About Cubic Defense secure communications: Deployed on the most technically advanced aircraft,  vessels, and land-based military vehicles in use today, our high-speed data links enable mission-critical communication over distances exceeding hundreds of miles.

Our Personnel Locator System can be installed on rotary, fixed-wing, and unmanned aerial vehicles to provide secure communication between rescue forces and isolated personnel during civil and combat rescue missions.

Job Title: Senior Principal FPGA Engineer USA

Location: On-site at San Diego HQ

Travel: The role may require occasional domestic and international travel

Clearance: Must be eligible for DoD security clearance

Job Summary:

As a Senior Principal FPGA Engineer, you will lead complex engineering projects, serve as a subject matter expert, and provide technical direction across programs. This role requires deep technical expertise and leadership in designing, developing, and testing innovative FPGA solutions for mission-critical systems. You will oversee project lifecycles, ensuring quality and efficiency, support new business developments and work with cross-functional teams to define strategies and implement state-of-the-art technologies. This position offers autonomy and requires significant problem-solving, decision-making, and collaboration with diverse stakeholders across the company and externally.

Essential Job Duties and Responsibilities:

• Drive firmware/RTL development and engineering efforts, ensuring alignment with industry best practices and emerging technologies.
• Provide technical vision, strategy, leadership, and mentorship to teams, guiding the execution of complex initiatives, which includes breaking down tasks into smaller sub-tasks, estimating, scheduling, and monitoring of project status, budgets, and schedule. 
• Lead FPGA architectural design reviews and risk mitigation strategies, ensuring secure and scalable solutions.
• Foster innovation by identifying, researching, and implementing cutting-edge technologies.
• Design, code, and deploy high-assurance DoD/NSA security worthy firmware. 
• Partner with cross-functional teams, including product management, quality assurance, and operations, to deliver high-quality products.
• Communicate technical advancements through presentations, whitepapers, trade studies, and briefings to internal teams and external customers (e.g. supporting CDRLs, SRR, PDR, CDR, TRR, TIMs, etc.)
• Maintain vendor relationships to evaluate and integrate third-party technologies as needed.
• Define test strategies and establish frameworks for automated and performance testing.
• Monitor system performance and scalability, driving improvements to meet evolving demands.
• Identify and implement process improvements to enhance FPGA engineering practices across the organization.

Minimum Job Requirements:

• Minimum of 12 years of related experience with a Bachelor’s degree; or 8 years and a Master’s degree; or a PhD with 5 years experience; or equivalent experience. in RTL/Firmware engineering, with a focus on developing and deploying advanced systems in high-impact environments.   
• Experience leading FPGA/RTL/DSP development projects, providing technical direction, and mentoring team members.
• Strong understanding of RTL design/architecture, HDL coding/simulation, FPGA implementation/test, HW/lab debug/integration, VHDL experience is required, MODEM design, networking protocols, DSP, communications systems, MATLAB modeling, Linux, version control, build scripts, fixed-point RTL implementation, timing closure, directed/automated testbench development, sub-system/system-level integration, etc.       
• Exceptional problem-solving abilities, with experience in conceptualizing and implementing solutions for complex challenges by breaking down complex blocks into smaller ones and defining the implementation approach for junior engineers to implement.
• Strong written and verbal communication skills, capable of conveying advanced concepts to diverse audiences.
• Strong leadership and collaboration skills, with experience leading cross-functional teams.

Preferred:

• Experience with Xilinx PS embedded processers, RFSOC, beam-forming technologies, SATCOM, protected waveforms, ISR datalinks, CDL waveforms, NSA certification process, COMSEC experience, bug tracking, C/C++/Python, etc. a plus.

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Cubic Pay Range:

$202,000.00 - $224,000.00 + benefits.

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The Cubic pay range for this job level is a general guideline only and not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

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Worker Type:

Employee

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We are committed to creating an inclusive workplace and welcome applications from people of all backgrounds. We do not discriminate based on any protected characteristic under applicable law.