Senior Signal and Power Integrity Engineer

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle! This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

What you'll be doing:

• Lead board/system SI design activities, PCB stack up design, material selection, design guide implementation, layout review, and post-layout analysis.

• System-level signal integrity simulation of PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB and other interfaces.

• Analyze and optimize Power delivery network (PDN) on PCBs.

• Work closely with Package and PCB Design teams crafting solutions for system SI/PI performance.

• Work with Application Engineering supporting customer board designs.

• TDR & VNA measurement for PKG/PCB material characterization and model correlation

What we need to see:

• BS/MS in Electrical Engineering (or equivalent experience) with minimum 4 years of experience as a SI/PI engineer

• Good understanding of electromagnetics, channel components and transmission line theory

• Experience with design and implementation of one or more high speed electrical interfaces, such as PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB etc.

• Hands on experience with HFSS, Sigrity, Hspice or similar industry standard simulation tools

• Experienced with Cadence Allegro PCB designer and Constraints Manager and or other PCB stack up designer tools.

• Understanding of impacts of high-volume PCB manufacturing on channel signal integrity

Ways to stand out from the crowd:

• Expertise in one or more of the high-speed interface SI/PI designs on any industry standard system platforms.

• Exposure to package design, interface timing budgets and system modeling

• Familiarity with high-speed transmitter, receiver design and various equalization schemes

• Familiarity with various signaling schemes like NRZ, PAM4 is a plus.

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.