Sr/Staff Digital Design Engineer
Company websitelightmatter.com (Lightmatter, opens in new tab)
Base salary $164K to $222K
Employer-published annual base salary, USD. Advertised base range in Mountain View, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationMountain View, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (17 min ago) · observed since
About this job
Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.
Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!
If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.
Lightmatter is (re)inventing the future of computing with light!
We are hiring a Digital Design Engineer to help develop an ASIC for the next-generation artificial intelligence computing architecture alongside a team of world-class scientists and engineers. If your passion is innovation, solving challenging technical problems, and doing impactful work, you should join our team and help build the world's first optical computers!
Responsibilities
- Develop RTL (i.e. system Verilog) modules with DFT considerations for IC development
- Debug complex logic and mixed signal simulations
- Understand and integrate silicon photonic communication and compute technology into digital accelerator design
- Actively work with Architecture, Design Verification, Physical Design, Photonic, Analog and Software teams to realize high performance, low power designs in advanced technology nodes
- Create design specifications and documentation to facilitate collaboration with partner teams
- Generate documentation for modules, including functionality and timing
- Manage RTL implementation to achieve functionally correct, performant designs within project schedules by identifying, communicating and mitigating risks.
Qualifications
- Bachelor’s degree in Electrical or Computer Engineering (or related fields)
- At least 5 years of experience in ASIC design or a similar high-speed chip design with multiple successful tape outs
- Proficiency in SystemVerilog or Verilog for digital logic design
- Proven experience debugging complex logic and mixed-signal simulations using industry-standard EDA tools (e.g., Synopsys VCS, Cadence Xcelium, Questa, or equivalent mixed-signal co-simulation environments)
- Demonstrated track record of delivering high-performance, low-power digital designs in advanced semiconductor process nodes
Preferred Qualifications
- Master's degree in Electrical or Computer Engineering (or related fields)
- Experience in communication protocols (e.g. PCIe)
- Knowledge of processor design, accelerators, and/or memory hierarchies
- Exposure to silicon photonics (SiPh), optical compute/interconnect architectures, or electro-optic interface integration.
- Strong scripting skills in Python, Perl, Tcl, or Bash to automate simulation and design workflows.
- Experience interfacing digital logic directly with analog mixed-signal (AMS) IP (e.g., SerDes, ADCs/DACs, optical transceivers)
We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.
Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.
$164,000—$222,000 USD
Benefits
- Comprehensive Health Care Plan (Medical, Dental & Vision)
- Retirement Savings Matching Program
- Life Insurance (Basic, Voluntary & AD&D)
- Generous Time Off (Vacation, Sick & Public Holidays)
- Paid Family Leave
- Short Term & Long Term Disability
- Training & Development
- Commuter Benefits
- Flexible, hybrid workplace model
- Equity grants (applicable to full-time employees)
Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.
Export Control
Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.
Source: Lightmatter on Greenhouse · View original posting (opens in new tab)
This listingSr/Staff Digital Design Engineer$164K to $222K
Staff Hardware Test & Bring-Up Engineer$167K to $193K
Sr. Staff Thermo-Mechanical Engineer$169K to $244K
Package Layout Engineer$157K to $176K
Signal Integrity Engineer$157K to $176K
Power Integrity Engineer$157K to $176K
Electro-Optic Link Hardware Engineer$155K to $190K
Chart as a table
| Role | Published base |
|---|---|
| Sr/Staff Digital Design Engineer (this listing) | $164K - $222K |
| Staff Hardware Test & Bring-Up Engineer | $167K - $193K |
| Sr. Staff Thermo-Mechanical Engineer | $169K - $244K |
| Package Layout Engineer | $157K - $176K |
| Signal Integrity Engineer | $157K - $176K |
| Power Integrity Engineer | $157K - $176K |
| Electro-Optic Link Hardware Engineer | $155K - $190K |
Observed changes
- Began meeting the published-salary criteria
- First observed on the employer's board
- Observed since
- Employer-stated posting date
- 2026-11-07
Where this pay comes from
Location as the employer wrote it: Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.
USD 164,000 – 222,000 · interval unstated · pay_input_range · Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.
- Method
- Structured pay field published by the employer
- Checked
- Rule set
- us-base-v2
The employer's job board publishes this pay as a dedicated data field. We read the field directly; no interpretation was needed.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
