Six Figure Work

SRAM Design Engineer

NVIDIA

Company websitenvidia.com (NVIDIA, opens in new tab)

Base salary $116,000  to $189,750

Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA

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  • LocationSanta Clara, CA
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (30 min ago) · observed since

About this job

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.The Digital IP (DIP) group at NVIDIA develops IP for every chip designed at NVIDIA. This group works closely with internal SOC design, silicon testing, and productization teams that turn our IP into products that change the world. One of the roles fulfilled by the DIP group is to develop sophisticated SRAM compilers that are used extensively by our SOC design partners. We are looking to hire a skilled and creative SRAM circuit designer to help achieve these goals in a high-visibility position.


What you'll be doing:

  • Embedded SRAM design: Transistor-level circuit design, supervising layout implementation, physical and logical verification, and debug of SRAM macros.
  • SRAM compiler development: Envisioning, defining, and coding more efficient ways to automate the simultaneous assembly and validation of multiple unique SRAM macros using NVIDIA's extensive compute resources.
  • Advanced development: Exploring the potential of future process nodes and developing techniques to realize optimal power, performance, and area characteristics.
  • Guiding SOC design, silicon test, and productization efforts: Collaborate with SOC design partners to help them achieve their overall performance and cost goals, guide the silicon test and characterization efforts, and working with productization teams to prepare new silicon for the demanding requirements of real-world applications.

What we need to see:

  • BSEE minimum (or equivalent experience), MSEE or PhD
  • 2+ years of professional experience in SRAM design
  • Familiarity with Cadence Virtuoso schematic and layout capture tools
  • Willingness and ability to use AI effectively in day-to-day tasks

Ways to stand out from the crowd

  • Self-motivation, attention to detail, and good written, verbal, and presentation skills are essential to success in this role
  • We rely heavily on AI coding and analysis tools such as Codex and Claude Code. The more developed your skills in this area, the better
  • Silicon testing and debugging experience
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 116,000 USD – 189,750 USD.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Source: NVIDIA on Workday · View original posting (opens in new tab)

This range next to 6 other live NVIDIA roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live NVIDIA roles with the nearest advertised base floor
RolePublished base
SRAM Design Engineer (this listing)$116,000 - $189,750
Global Virtual Card Payment Administrator$116,000 - $195,500
Forward Deployed Engineer - Finance$116K - $230K
Customer Solutions Architect, Applications Engineering$116,000 - $189,750
Senior Revenue Accountant – Revenue Accounting Operations$116,000 - $195,500
ASIC Design Engineer – Clocks IP$116,000 - $218,500
Deep Learning Compiler Verification Engineer$116,000 - $189,750

Same $100K to $400K scale as every card. All NVIDIA roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-10-30
Where this pay comes from

Location as the employer wrote it: US, CA, Santa Clara

base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 116,000 USD – 189,750 USD.

Method
Employer text, read with fixed rules and re-verified
Checked
Rule set
us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.