Hardware Engineer
Company websiteintel.com (Intel, opens in new tab)
Base salary From $122,440
Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSanta Clara, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (2 h ago) · observed since
About this job
Job Details:
Job Description:
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
Job Responsibilities:
- Support hardware design of an optical transceiver and evaluation boards meeting product specifications, including schematic capture, circuit simulation, PCB design guidance, DFM review and design verification testing.
- Expertise in designing 100G/lane and 200G/lane module PCBA, own the schematic and layout execution, experience with designing PDN for high-speed DSP, RFICs, manage PI and SI requirements.
- Experience with 100Gbps+ DSP, Driver, TIA, uControllers, DACs, ADCs, Voltage regulators, etc.
- Key contributor to Product Requirements, Owns PCBA design from concept phase to full final design and EVT/DVT phase of the product.
- Understand electrical and optical requirements and specifications of optical transceiver MSA. Like 800G DR8/2xFR4, 1.6T DR8/2xFR4, 800G LPO, 1.6T LRO etc.
- Maintain documentation of a hardware design specification, Pass design check list prior to tape out, BOM specifications and work with NPI team to build PCBA.
- Lead design reviews and present design summary to management, highlight risks with mitigation plans.
- Interface and work collaboratively with mechanical engineers, optical engineers, Photonics engineer, firmware engineers, process engineers and test engineers.
- Design and coordinate with PI/SI engineers to simulate high-speed interfaces, RF traces, dc and ac PI analysis, etc. 100Gbps, 200Gbps NRZ and PAM4 signaling.
- Interact with program manager, buyer/planner and suppliers to make sure designed parts are available in a timely manner for build.
- Troubleshooting and performance optimization of the sub-system/transceiver module board.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.
Required Skills:
Bachelor’s degree & 4+ years of experience or Master's degree & 3+ years of experience or PhD & 0 years in Electrical Engineering or similar STEM field.
3+ years of experience in the following:
- HW/circuit design, Schematic design and Layout floor planning.
- Experienced in Cadence tools for schematic and layout.
- High density and high-speed multiple-layer board design.
- Voltage regulator, uController, DAC/ADCs component selection, design and layout optimization to meet product requirements.
- PCB and product bring up, laboratory optical and electrical measurement skills.
- High speed Tline design and layout guidelines (25-50G NRZ, 100Gbps PAM4 and above)
Preferred Skills:
- Experience working with high volume PCB/substrate fab houses. Selecting PCB stackup that meets product requirement.
- Experience with electronics CAD tools and modeling. Experience in PI and SI simulations is a plus.
- Knowledge of transceiver/test board electrical design principles, including module architecture, high speed signal integrity, crosstalk, power integrity, noise, soft start, ESD, FW, testing, etc.
- Experienced in layout and able to direct layout engineer with clear design priority.
- Understand principles of micro-controller and communication protocols such as SPI, I2C, MDIO, CMIS management interface for optical modules.
- Experience working with AWG, DCAM, VNA/LCA to characterize high speed performance.
- Strong communication and presentation skills.
Job Type:
College GradShift:
Shift 1 (United States of America)Primary Location:
US, California, Santa ClaraAdditional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Source: Intel on Workday · View original posting (opens in new tab)
Pay in context
This role's base floor ($122,440) is above 21% of the 2,074 Engineering (non-software) roles in California listed on this site; 6 others list the same floor. Their median floor is $146,200; the middle half runs from $125,000 to $175,000.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 6, 2026.
This listingHardware EngineerFrom $122,440
GPU Design Verification EngineerFrom $122,440
Senior Standard Cell Library EngineerFrom $122,440
Silicon Photonics Test EngineerFrom $122,440
Systems and Solutions EngineerFrom $122,440
Design Automation Engineer - Neuromorphic ComputingFrom $122,440
Senior Design Verification Engineer - Neuromorphic ComputingFrom $122,440
Chart as a table
| Role | Published base |
|---|---|
| Hardware Engineer (this listing) | From $122,440 |
| GPU Design Verification Engineer | From $122,440 |
| Senior Standard Cell Library Engineer | From $122,440 |
| Silicon Photonics Test Engineer | From $122,440 |
| Systems and Solutions Engineer | From $122,440 |
| Design Automation Engineer - Neuromorphic Computing | From $122,440 |
| Senior Design Verification Engineer - Neuromorphic Computing | From $122,440 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-09-17
Where this pay comes from
Location as the employer wrote it: US, California, Santa Clara
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
