Six Figure Work

Principal Photonics IC Design Engineer

NVIDIA

Company websitenvidia.com (NVIDIA, opens in new tab)

Base salary $232K  to $368K

Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA

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  • LocationSanta Clara, CA
  • WorkplaceWorkplace not stated
  • Status at last checkSource accepting applications when checked
  • Last checked (54 min ago) · observed since

About this job

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice and join us today!

NVIDIA's Mixed-Signal Design (MSD) Photonics team is building the next generation of co-packaged optical interconnects to power the world's most advanced AI supercomputers. We are looking for a Principal Photonics IC Design Engineer to serve as the technical lead owning our photonics integrated circuit (PIC) product — from architecture definition through production tapeout and silicon validation.

What you will be doing:

  • Own end-to-end PIC product delivery: architecture, design, layout, DRC/LVS verification, tapeout, and post-silicon validation on advanced silicon photonics platforms

  • Lead cross-functional execution across photonic device, analog/mixed-signal, packaging, and systems teams

  • Drive tapeout schedules, define design milestones, and resolve critical path issues across multiple concurrent PIC programs

  • Architect optical transceiver PICs integrating modulators, photodetectors, wavelength multiplexing, waveguides, and optical couplers for high-speed and/or DWDM applications

  • Define and improve PIC design methodology, automation (e.g., scripted DRC, parameterized cells), and verification flows in Cadence and related EDA tools

  • Mentor and technically guide a team of photonics designers; set technical direction for the photonics PIC roadmap

What We Need to See:

  • PhD in Electrical Engineering, Physics, Applied Physics, or a closely related field with emphasis on integrated photonics, silicon photonics, or photonic device physics (or equivalent experience).

  • 8+ years of industry experience in photonics IC design, with demonstrated progression into technical leadership roles

  • Deep hands-on expertise with Cadence design environment (Virtuoso, PCell development, SKILL scripting) for photonic IC layout and simulation

  • Proven track record of production tapeouts — you have personally driven PICs from design through GDS signoff on a foundry silicon photonics process

  • Strong understanding of photonic device physics: waveguides, passive/active components, ring/MZI modulators, photodetectors, optical couplers

  • Demonstrated technical leadership: setting project scope, making architecture tradeoffs, driving cross-team alignment, and delivering on schedule

Ways to Stand Out From the Crowd:

  • Experience with high-speed (>50 Gbaud) optical modulator or receiver PIC design for datacom/telecom applications

  • Experience with DWDM PIC architectures (MUX/DEMUX, multi-channel transceivers, wavelength tuning)

  • Familiarity with co-packaged optics (CPO) system requirements and advance packaging integration

  • Experience with photonic circuit simulation and CAD tools (Ansys Lumerical, ZeMax, Cadence, MATLAB, Python and Verilog-A) and electromagnetic solvers (FDTD, FDE, EME)

  • Track record of publications and/or patents in silicon photonics

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 232,000 USD – 368,000 USD.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Source: NVIDIA on Workday · View original posting (opens in new tab)

This range next to 6 other live NVIDIA roles with the nearest advertised base floor
Chart as a table
This range next to 6 other live NVIDIA roles with the nearest advertised base floor
RolePublished base
Principal Photonics IC Design Engineer (this listing)$232K - $368K
Senior Manager, ASIC Chip Engineering$232K - $368K
Principal Chip Lead, Silicon Co-Design Group$232K - $368K
Principal System Power Management and Performance Architect$232K - $368K
Senior Manager, Post-Silicon Bring-Up$232K - $368K
Director, Global Workplace Design$232,000 - $356,500
Principal EDA R&D Engineer$232K - $368K

Same $100K to $400K scale as every card. All NVIDIA roles · How to read the bar

Observed changes

  1. First observed on the employer's board
  2. Began meeting the published-salary criteria
Observed since
Employer-stated posting date
2026-10-30
Where this pay comes from

Location as the employer wrote it: US, CA, Santa Clara

base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary range for this position is 232,000 USD – 368,000 USD.

Method
Employer text, read with fixed rules and re-verified
Checked
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us-base-v2

The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.

What we verified

  • The pay figures come from the employer's own listing, quoted exactly above.
  • The pay is an annual base salary in US dollars with a minimum of at least $100,000.
  • The role was publicly listed on the employer's job board when last checked.

We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.