Senior Design Automation Engineer
Company websiteamazon.com (Amazon, opens in new tab)
Base salary $185,200 to $250,000
Employer-published annual base salary, USD. Advertised base range in Austin, TX
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationAustin, TX
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (33 min ago) · observed since
About this job
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.
We are seeking a Senior Design Automation Engineer to join our hardware team and contribute to the physical design of advanced IC packages and PCBs for next-generation machine learning and data center ASICs.
In this role, you will develop automation to enable physical design teams to execute Package and PCB products from floor planning through tape out and manufacturing release, working closely with senior engineers, SI/PI, thermal, and manufacturing teams to deliver production-ready designs that meet performance, density, and reliability targets.
Key job responsibilities
- Develop and deploy efficient design methodologies to support Package and PCB layout tasks across the design cycle: die floor planning, bump/pad assignment, RDL routing, substrate design, verification, and tape out release.
- Evaluate industry EDA offerings and make recommendations for purchase and usage of advanced packaging features to design 2.5D interposer, 3D-IC, fan-out wafer-level packaging, and silicon bridge technologies (e.g., CoWoS, EMIB, or similar).
- Deliver custom design automation to improve RDL and substrate routing for high-density interconnects including microbumps, C4 bumps, TSVs, microvias, and PTH vias across multi-layer organic substrates or silicon interposers.
- Contribute to cross-level teams for co-optimization across die RDL, interposer/substrate, and PCB levels under guidance from senior engineers.
- Develop data integration flows for co-design data across Package, PCB and SI/PI flows.
- Develop software in the following languages: Python, Skill, TCL. Utilize AI coding agents to speed development and iteration.
- Identify preferred methodologies to integrate physical verification checks (DRC, connectivity, shorts/opens) into physical design cycles.
- Follow and help refine package design rules and guidelines, working with OSAT partners and foundries to ensure DFM compliance.
- Collaborate with SI/PI engineers to incorporate electrical constraints into the physical layout methodologies — impedance-controlled routing, power plane optimization, and critical net shielding.
About the team
Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we’re building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future.
Basic Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering
- 7+ years of experience working with physical design tools across Package and PCB domains: Allegro, APD, 3DICC, Expedition
- 10+ years of Automation experience for physical designs
Preferred Qualifications
- Master's degree or Ph.D. degree in Electrical Engineering or related field
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, TX, Austin - 185,200.00 - 250,000.00 USD annually
Source: Amazon · View original posting (opens in new tab)
This listingSenior Design Automation Engineer$185,200 to $250,000
Sr. ASIC Design Engineer, Blink/Ring ASIC Team$185,200 to $250,000
Sr. Package Engineer, Annapurna Labs - AI Silicon Packaging$185,200 to $250,000
Senior Product Development Engineer, Annapurna Labs Silicon Operations$185,200 to $250,000
Sr. Thermal & Mechanical Packaging Engineer, Annapurna Labs$185,200 to $250,000
Sr. DFT Design Engineer, AWS Machine Learning Acceleration$185,200 to $250,000
Software Development Manager, Volume Metadata, EBS$184,900 to $250,200
Chart as a table
| Role | Published base |
|---|---|
| Senior Design Automation Engineer (this listing) | $185,200 - $250,000 |
| Sr. ASIC Design Engineer, Blink/Ring ASIC Team | $185,200 - $250,000 |
| Sr. Package Engineer, Annapurna Labs - AI Silicon Packaging | $185,200 - $250,000 |
| Senior Product Development Engineer, Annapurna Labs Silicon Operations | $185,200 - $250,000 |
| Sr. Thermal & Mechanical Packaging Engineer, Annapurna Labs | $185,200 - $250,000 |
| Sr. DFT Design Engineer, AWS Machine Learning Acceleration | $185,200 - $250,000 |
| Software Development Manager, Volume Metadata, EBS | $184,900 - $250,200 |
Observed changes
- Began meeting the published-salary criteria
- First observed on the employer's board
- Observed since
- Employer-stated posting date
- 2026-09-24
Where this pay comes from
Location as the employer wrote it: US, TX, Austin
USA, TX, Austin - 185,200.00 - 250,000.00 USD annually
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.