Sr. DFT Design Engineer, AWS Machine Learning Acceleration
Company websiteamazon.com (Amazon, opens in new tab)
Base salary $185,200 to $250,000
Employer-published annual base salary, USD. Advertised base range in Austin, TX
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationAustin, TX
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (2 h ago) · observed since
About this job
Custom SoCs (System on Chip) are at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team, you'll be responsible for designing and optimizing hardware in our data centers, including AWS Inferentia and Trainium systems—our custom-designed machine learning inference and training servers. Our success depends on world-class server infrastructure as we handle massive scale and rapidly integrate emerging technologies. We're looking for a Sr. DFT Design Engineer to help us trailblaze new technologies and architectures while ensuring high design quality and making the right trade-offs.
Key job responsibilities
- Define and develop state-of-the-art Design for Test (DFT) architectures for advanced technology nodes
- Work closely with block designers and physical design (PD) team to implement highly efficient DFT solutions
- Act as the primary point of contact for cross-functional stakeholders (PD, Architecture, and Product Engineering) to align schedules and goals
- Mentor and develop junior engineers through code reviews, methodology training, and technical guidance
- Manage project timelines and deliverables, ensuring high-quality DFT implementation from RTL through Silicon bring-up
Basic Qualifications
- Bachelor's degree in computer science, electrical engineering, or related field
- 5+ years of practical semiconductor ASIC design work including owning end to end design of major SOC blocks experience
- Knowledge about industry standard tools and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
- Experience with automation script development
Preferred Qualifications
- Master's degree or Ph.D. degree in Electrical Engineering or related field
- Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs
- Experience with modern ASIC/FPGA design and verification tools
- Experience with SOC bring-up and post-silicon validation
- MS degree in computer science, electrical engineering, or related field
- Experience with gate-level testing and multi-clock design practices (CDC)
- Good breadth of knowledge in chip design from micro-architecture through physical design
- Good knowledge of design verification (DV) simulation methodologies
- Strong programming and scripting skills in Perl, Python or Tcl
- Experience with industry standard DFT/SCAN/ATPG tools
- Experience with STA constraints development and analysis for DFT modes
- Practical experience with silicon debug
Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, TX, Austin - 185,200.00 - 250,000.00 USD annually
Source: Amazon · View original posting (opens in new tab)
Pay in context
This role's base floor ($185,200) is above 91% of the 71 Data & ML roles in Texas listed on this site. Their median floor is $143,640; the middle half runs from $130,000 to $160,000.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 6, 2026.
This listingSr. DFT Design Engineer, AWS Machine Learning Acceleration$185,200 to $250,000
Sr. ASIC Design Engineer, Blink/Ring ASIC Team$185,200 to $250,000
Sr. Package Engineer, Annapurna Labs - AI Silicon Packaging$185,200 to $250,000
Senior Product Development Engineer, Annapurna Labs Silicon Operations$185,200 to $250,000
Sr. Thermal & Mechanical Packaging Engineer, Annapurna Labs$185,200 to $250,000
Senior Design Automation Engineer$185,200 to $250,000
Software Development Manager, Volume Metadata, EBS$184,900 to $250,200
Chart as a table
| Role | Published base |
|---|---|
| Sr. DFT Design Engineer, AWS Machine Learning Acceleration (this listing) | $185,200 - $250,000 |
| Sr. ASIC Design Engineer, Blink/Ring ASIC Team | $185,200 - $250,000 |
| Sr. Package Engineer, Annapurna Labs - AI Silicon Packaging | $185,200 - $250,000 |
| Senior Product Development Engineer, Annapurna Labs Silicon Operations | $185,200 - $250,000 |
| Sr. Thermal & Mechanical Packaging Engineer, Annapurna Labs | $185,200 - $250,000 |
| Senior Design Automation Engineer | $185,200 - $250,000 |
| Software Development Manager, Volume Metadata, EBS | $184,900 - $250,200 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-05-01
Where this pay comes from
Location as the employer wrote it: US, TX, Austin
USA, TX, Austin - 185,200.00 - 250,000.00 USD annually
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.