Senior FPGA Prototyping Engineer - Hardware
Company websitenvidia.com (NVIDIA, opens in new tab)
Base salary $196K to $368K
Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSanta Clara, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (2 h ago) · observed since
About this job
Are you passionate about FPGA prototyping? Are you interested in pushing the boundaries of innovation to make FPGA prototypes faster and more efficient? Can you work in a fast-paced environment that requires coordination between many teams across geographies and resolving sophisticated problems daily? If so, we are looking for hardworking engineers who will craft FPGA prototypes of our next generation GPUs and SOCs on standard FPGA prototyping platforms.
We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA.
What you'll be doing:
- Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route.
- Improve performance of the prototype, analyze timing and generate bit streams.
- Bring up the design on FPGA prototyping platforms and indulge in problem solving.
- Release the prototype to the customers and support them when they face problems.
- You are expected to understand the design and implementation, define the configurations, develop/modify the bringup and testing infrastructure and verify the correctness of the design.
- Good coordination with architects, designers, verification engineers, and SW teams will be needed to accomplish your tasks.
What we need to see:
- BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 12+ years of experience, or MS with 10+ years of proven experience in FPGA prototyping.
- Good understanding of FPGA prototyping architecture, devices, flows and tools.
- Experience in backend flows of FPGA Prototyping - Synthesis, P&R and Timing closure, with emphasis on Synopsys Protocompiler or Siemens VPS and Xilinx Vivado
- Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB).
- Knowledge of Verilog, System Verilog and digital design concepts.
- Good debugging and problem solving skills.
- Hands on experience with lab FPGA debug methodologies, tools (Identify or ChipScope), and lab debug equipment (oscilloscopes, logic analyzers).
Ways to stand out from the crowd:
- Scripting knowledge (Perl/shell/Tcl) is desired.
- Good documentation, communication and interpersonal skills.
- Experience with memory bring up of Memory (LPDDR5/6, DDR5/6), CXL/PCIE and/or high speed I/F such as USB4/3 is desirable
- Prior experience with hardware emulation or prototyping (Synopsys HAPS or Siemens ProFPGA) of a high-performance processor or SOC is a plus.
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join us today!
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:196,000 USD – 310,500 USD for Level 5; and 232,000 USD – 368,000 USD for Level 6.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Source: NVIDIA on Workday · View original posting (opens in new tab)
This listingSenior FPGA Prototyping Engineer - Hardware$196K to $368K
Senior Mixed Signal Design Engineer$196K to $368K
Senior System Integration Engineer, Memory$196,000 to $310,500
Senior ASIC Floorplan Design Engineer$196,000 to $310,500
Senior SRAM Engineer$196,000 to $310,500
Senior Manager, PR - AI Software$196,000 to $310,500
Manager, ASIC Chip - GPU$196,000 to $310,500
Chart as a table
| Role | Published base |
|---|---|
| Senior FPGA Prototyping Engineer - Hardware (this listing) | $196K - $368K |
| Senior Mixed Signal Design Engineer | $196K - $368K |
| Senior System Integration Engineer, Memory | $196,000 - $310,500 |
| Senior ASIC Floorplan Design Engineer | $196,000 - $310,500 |
| Senior SRAM Engineer | $196,000 - $310,500 |
| Senior Manager, PR - AI Software | $196,000 - $310,500 |
| Manager, ASIC Chip - GPU | $196,000 - $310,500 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-10-30
Where this pay comes from
Location as the employer wrote it: US, CA, Santa Clara (Levels 5-6 combined)
196,000 USD – 310,500 USD for Level 5; and 232,000 USD – 368,000 USD for Level 6.
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
