Analog Design Engineer
Company websiteflir.com (Teledyne FLIR, opens in new tab)
Base salary $113,600 to $151,400
Employer-published annual base salary, USD. Advertised base range in Goleta, CA
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationGoleta, CA
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (18 min ago) · observed since
About this job
Be visionary
Teledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research.
We are looking for individuals who thrive on making an impact and want the excitement of being on a team that wins.
Job Description
Design the analog technology at the heart of advanced infrared imaging systems.
As a Senior Analog Engineer, you’ll take a leading role in the development of infrared image sensor arrays, with ownership spanning analog IC design, ROIC architecture, performance analysis, simulation, integration, and validation.
You’ll influence chip-level architecture, evaluate critical design tradeoffs, and develop analog signal paths and timing architectures that directly impact image performance. This is a hands-on technical role that combines system-level analysis with detailed transistor-level design and simulation.
You’ll also provide technical leadership to digital and layout engineers, collaborate with Test and Systems Engineering through product characterization, and interface with customers on requirements and technical performance.
This role offers the opportunity to expand your technical ownership and grow toward a Principal Analog Designer position.
What You’ll Do
- Lead analog design activities for infrared image sensor arrays and Read-Out Integrated Circuits (ROICs).
- Translate customer and system requirements into IC architecture, analog circuitry, timing, and performance requirements.
- Develop analog IC blocks, signal paths, floor plans, and timing architectures.
- Perform transistor-level and SPICE simulations, including noise, power, variability, small-signal, and performance analysis.
- Conduct design trade studies and contribute to chip-level architectural decisions.
- Evaluate layout parasitics and their impact on circuit performance.
- Work with foundry PDKs and support foundry interactions and IC tape-out.
- Provide technical direction and coordination to digital designers, layout engineers, and other members of the design team.
- Partner with Test and Systems Engineering to support IC characterization, verification, and hardware debugging.
- Create clear technical documentation and present designs, performance analysis, and tradeoffs to engineering teams and customers.
Required Qualifications
- Bachelor’s degree in Electrical Engineering, Physics, or a related technical discipline. Master’s degree or PhD preferred.
- Relevant professional experience may be considered in lieu of education.
- 8+ years of experience in analog or mixed-signal IC design or a closely related field.
- Strong experience with analog CMOS design, circuit topology, and schematic capture.
- Experience with ROICs, image sensor electronics, or related IC architectures.
- Strong knowledge of SPICE simulation, noise analysis, small-signal analysis, and circuit performance.
- Experience analyzing layout parasitic effects.
- Experience working with foundry PDKs and supporting the IC tape-out process.
- Experience with IC characterization, testing, or hardware debugging.
- Ability to provide technical leadership and collaborate across IC Design, Layout, Systems, and Test Engineering.
- Strong technical communication and presentation skills.
- Must be a U.S. citizen or lawful permanent resident.
Preferred Experience
Experience in one or more of the following areas is a plus:
- Infrared imaging systems
- ROIC or image sensor design
- Electro-optical systems
- Mixed-signal IC design
- Advanced analog CMOS design
- Foundry interaction and process technologies
- IC characterization and test
- Technical leadership of multidisciplinary design teams
- Customer-facing technical design reviews
What We Offer
- Competitive salary and benefits package
- Health, dental, vision, and life insurance starting Day 1
- Paid vacation, sick time, and holidays
- 401(k) with company match
- Employee Stock Purchase Plan
- Educational tuition reimbursement
- Career growth and development opportunities
- Collaborative, highly technical engineering environment
- Fun employee events throughout the year
If you’re passionate about analog IC design and want to take meaningful technical ownership of advanced infrared imaging technology while continuing to grow toward a Principal-level role, we’d love to hear from you.
Salary Range:
$113,600.00-$151,400.000The anticipated salary range listed for this role is only an estimate. Actual compensation for successful candidates is carefully determined based on several factors including, but not limited to, location, local regulations (such as minimum wage), education/training, work experience, key skills, and type of position.
Teledyne and all of our employees are committed to conducting business with the highest ethical standards. We require all employees to comply with all applicable laws, regulations, rules and regulatory orders. Our reputation for honesty, integrity and high ethics is as important to us as our reputation for making innovative sensing solutions.
Teledyne is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age, or any other characteristic or non-merit based factor made unlawful by federal, state, or local laws.
Source: Teledyne FLIR on Workday · View original posting (opens in new tab)
This listingAnalog Design Engineer$113,600 to $151,400
SAP Finance Solution Architect$114,800 to $153,100
Environmental, Health and Safety Manager$114,800 to $153,100
Quality Assurance Manager$114,800 to $153,100
Wafer Fab Process Engineer$113,600 to $151,400
Sr. Embedded Software Engineer$113,600 to $151,400
Firmware Engineer – FPGA & Imaging Systems$113,600 to $151,400
Chart as a table
| Role | Published base |
|---|---|
| Analog Design Engineer (this listing) | $113,600 - $151,400 |
| SAP Finance Solution Architect | $114,800 - $153,100 |
| Environmental, Health and Safety Manager | $114,800 - $153,100 |
| Quality Assurance Manager | $114,800 - $153,100 |
| Wafer Fab Process Engineer | $113,600 - $151,400 |
| Sr. Embedded Software Engineer | $113,600 - $151,400 |
| Firmware Engineer – FPGA & Imaging Systems | $113,600 - $151,400 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-10-20
Where this pay comes from
Location as the employer wrote it: US - Goleta, CA
$113,600.00-$151,400.000
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
