Senior Verification Engineer - CPU
Company websitenvidia.com (NVIDIA, opens in new tab)
Base salary $196K to $368K
Employer-published annual base salary, USD. Advertised base range in Santa Clara, CA +1 more
You apply on the employer's own site. Six Figure Work does not handle applications.
- LocationSanta Clara, CA +1 more
- WorkplaceWorkplace not stated
- Status at last checkSource accepting applications when checked
- Last checked (38 min ago) · observed since
All places named
- Santa Clara, CA
- Austin, TX
About this job
We are now looking for a Senior Verification Engineer!
As a member of our CPU Verification Team, you will be responsible for a portion of the Design Verification, focusing on tasks such as testbench/scoreboard/stimulus development, regression debug, and coverage closure, supporting design, implementation, and system level validation/debug. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you’ll be doing:
Technical leadership role to define/plan/implement/execute performance verification strategy of sophisticated CPU designs
Ability to delve into lowest level details of CPU unit design specification, implementation and it's performance impact
Interactions with architect and design engineers to define detailed scope of micro architectural features
Draft detailed performance testplans
Define/Create scalable micros to validate features
Build infra/tooling needed for efficient performance correlation debug
Ability to lead and provide detailed technical guidance to junior engineers
Agility to work on multiple tasks/projects
What we need to see:
BS/MS or equivalent experience
12+ years of experience
Background with CPU micro architecture
Experience with workload analysis
Proficient of script language like Perl, Python
Working knowledge of C/C++
Good communication skills and ability & desire to work as a team player are a must
Ways to stand out from the crowd:
Experience leading performance validation of major blocks of CPU pipeline
Experience with ARM A64, X86 Architectures
With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.
#LI-Hyrbid
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:196,000 USD – 310,500 USD for Level 5; and 232,000 USD – 368,000 USD for Level 6.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 7, 2026.This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Source: NVIDIA on Workday · View original posting (opens in new tab)
Pay in context
This role's base floor ($196,000) is above 85% of the 2,073 Engineering (non-software) roles in California listed on this site; 5 others list the same floor. Their median floor is $146,200; the middle half runs from $125,000 to $175,000.
Only jobs on this site count, and each one publishes a base salary of $100,000 or more, so this compares six-figure jobs with each other, not with the whole market. Computed Nov 6, 2026.
This listingSenior Verification Engineer - CPU$196K to $368K
Senior Mixed Signal Design Engineer$196K to $368K
Senior System Integration Engineer, Memory$196,000 to $310,500
Senior FPGA Prototyping Engineer - Hardware$196K to $368K
Senior ASIC Floorplan Design Engineer$196,000 to $310,500
Senior SRAM Engineer$196,000 to $310,500
Senior Manager, PR - AI Software$196,000 to $310,500
Chart as a table
| Role | Published base |
|---|---|
| Senior Verification Engineer - CPU (this listing) | $196K - $368K |
| Senior Mixed Signal Design Engineer | $196K - $368K |
| Senior System Integration Engineer, Memory | $196,000 - $310,500 |
| Senior FPGA Prototyping Engineer - Hardware | $196K - $368K |
| Senior ASIC Floorplan Design Engineer | $196,000 - $310,500 |
| Senior SRAM Engineer | $196,000 - $310,500 |
| Senior Manager, PR - AI Software | $196,000 - $310,500 |
Observed changes
- First observed on the employer's board
- Began meeting the published-salary criteria
- Observed since
- Employer-stated posting date
- 2026-11-03
Where this pay comes from
Location as the employer wrote it: US, CA, Santa Clara • US, TX, Austin (Levels 5-6 combined)
196,000 USD – 310,500 USD for Level 5; and 232,000 USD – 368,000 USD for Level 6.
- Method
- Employer text, read with fixed rules and re-verified
- Checked
- Rule set
- us-base-v2
The pay passage appears in the employer's own job text. Fixed, deterministic rules located it, and the passage below was checked against the stored copy of the posting.
What we verified
- The pay figures come from the employer's own listing, quoted exactly above.
- The pay is an annual base salary in US dollars with a minimum of at least $100,000.
- The role was publicly listed on the employer's job board when last checked.
We do not verify what the employer will actually offer, whether the employer is still recruiting for the role, or anything beyond what the employer published. Full methodology.
